On Sun, Jul 20, 2014 at 08:20:49AM +0200, Richard Cochran wrote:
On Sun, Jul 20, 2014 at 10:57:33AM +0800, Shawn Guo wrote:
quoted
I think the cause is that PTP is still accessing registers after FEC
driver calls fec_enet_clk_enable(ndev, false) to disable FEC clocks.
Can you please try to provide a fix for this regression soon?
What do you mean by, "PTP is still accessing registers"?
The only access to any register is through the driver, and the driver
can and should make sure all register accesses are safe.
Sorry for being vague, Richard. I meant PTP driver is still accessing
registers.
With Fugang's clock management patch, FEC clocks will be disabled to
save power after FEC gets probed. But at that point, fec_ptp driver
already launches a timer, which will trigger the read on FEC ATIME
register once per second.
Shawn