[PATCH V6 2/3] Documentation: gpio: Add APM X-Gene SoC GPIO controller DTS binding
From: Feng Kan <hidden>
Date: 2014-07-31 19:03:26
Also in:
linux-devicetree, linux-gpio
Subsystem:
gpio subsystem, open firmware and flattened device tree bindings, the rest · Maintainers:
Linus Walleij, Bartosz Golaszewski, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Documentation for APM X-Gene SoC GPIO controller DTS binding. Signed-off-by: Feng Kan <redacted> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> --- .../devicetree/bindings/gpio/gpio-xgene.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xgene.txt
diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene.txt
new file mode 100644
index 0000000..86dbb05
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-xgene.txt@@ -0,0 +1,22 @@ +APM X-Gene SoC GPIO controller bindings + +This is a gpio controller that is part of the flash controller. +This gpio controller controls a total of 48 gpios. + +Required properties: +- compatible: "apm,xgene-gpio" for X-Gene GPIO controller +- reg: Physical base address and size of the controller's registers +- #gpio-cells: Should be two. + - first cell is the pin number + - second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +- gpio-controller: Marks the device node as a GPIO controller. + +Example: + gpio0: gpio0 at 1701c000 { + compatible = "apm,xgene-gpio"; + reg = <0x0 0x1701c000 0x0 0x40>; + gpio-controller; + #gpio-cells = <2>; + };
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1.9.1