DDR50 mode now works on the rockchip driver, so enable it.

NOTE: if Addy spins (mmc: dw_mmc: add support for RK3288) before it
lands then we could squash this into my (ARM: dts: Enable emmc and
sdmmc on the rk3288-evb boards).

Signed-off-by: Doug Anderson <dianders@chromium.org>
---
 arch/arm/boot/dts/rk3288-evb.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index e44e34f..ec580fa 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi

@@ -41,6 +41,7 @@
 	broken-cd;
 	bus-width = <8>;
 	cap-mmc-highspeed;
+	mmc-ddr-1_8v;
 	non-removable;
 	num-slots = <1>;
 	pinctrl-names = "default";

-- 
2.0.0.526.g5318336