[PATCH 02/35] arm: omap: irq: define INTC_ILR0 register
From: Felipe Balbi <hidden>
Date: 2014-07-28 21:29:00
Also in:
linux-devicetree, linux-omap, lkml
Subsystem:
arm port, omap2+ support, the rest · Maintainers:
Russell King, Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros, Tony Lindgren, Linus Torvalds
this is currently used as a hardcoded 0x100 offset. Signed-off-by: Felipe Balbi <redacted> --- arch/arm/mach-omap2/irq.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 7b2cf9a..96073a2 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c@@ -41,6 +41,7 @@ #define INTC_MIR_CLEAR0 0x0088 #define INTC_MIR_SET0 0x008c #define INTC_PENDING_IRQ0 0x0098 +#define INTC_ILR0 0x0100 /* Number of IRQ state bits in each MIR register */ #define IRQ_BITS_PER_REG 32
--
2.0.1.563.g66f467c