[PATCH v2 3/3] ARM: dts: rk3xxx: add PWM nodes

@@ -114,6 +114,22 @@
 			clock-names = "biu", "ciu";
 		};
 
+		pwm0: pwm at 20030000 {
+			clocks = <&cru PCLK_PWM01>;
+		};
+
+		pwm1: pwm at 20030010 {
+			clocks = <&cru PCLK_PWM01>;
+		};
+
+		pwm2: pwm at 20050020 {
+			clocks = <&cru PCLK_PWM23>;
+		};
+
+		pwm3: pwm at 20050030 {
+			clocks = <&cru PCLK_PWM23>;
+		};
+
 		cru: cru at 20000000 {
 			compatible = "rockchip,rk3188-cru";
 			reg = <0x20000000 0x1000>;

@@ -310,6 +326,30 @@
 							<RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>;
 				};
 			};
+
+			pwm0 {
+				pwm0_pins: pwm0-pins {
+					rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>;
+				};
+			};
+
+			pwm1 {
+				pwm1_pins: pwm1-pins {
+					rockchip,pins = <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_none>;
+				};
+			};
+
+			pwm2 {
+				pwm2_pins: pwm2-pins {
+					rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_none>;
+				};
+			};
+
+			pwm3 {
+				pwm3_pins: pwm3-pins {
+					rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_none>;
+				};
+			};
 		};
 	};
 };

@@ -135,5 +135,37 @@
 
 			status = "disabled";
 		};
+
+		pwm0: pwm at 20030000 {
+			compatible = "rockchip,rk2928-pwm";
+			reg = <0x20030000 0x10>;
+			#pwm-cells = <2>;
+			clocks = <&clk_gates7 10>;
+			status = "disabled";
+		};
+
+		pwm1: pwm at 20030010 {
+			compatible = "rockchip,rk2928-pwm";
+			reg = <0x20030010 0x10>;
+			#pwm-cells = <2>;
+			clocks = <&clk_gates7 10>;
+			status = "disabled";
+		};
+
+		pwm2: pwm at 20050020 {
+			compatible = "rockchip,rk2928-pwm";
+			reg = <0x20050020 0x10>;
+			#pwm-cells = <2>;
+			clocks = <&clk_gates7 11>;
+			status = "disabled";
+		};
+
+		pwm3: pwm at 20050030 {
+			compatible = "rockchip,rk2928-pwm";
+			reg = <0x20050030 0x10>;
+			#pwm-cells = <2>;
+			clocks = <&clk_gates7 11>;
+			status = "disabled";
+		};
 	};
 };