[PATCH 38/75] ARM: l2c: add decode for L2C-220 cache ways
From: Russell King <hidden>
Date: 2014-03-28 15:17:40
Subsystem:
arm port, the rest · Maintainers:
Russell King, Linus Torvalds
From: Russell King <hidden>
Date: 2014-03-28 15:17:40
Subsystem:
arm port, the rest · Maintainers:
Russell King, Linus Torvalds
Rather than assuming these are always 8-way, it can be decoded from the auxillary register in the same manner as L2C-210. Signed-off-by: Russell King <redacted> --- arch/arm/mm/cache-l2x0.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 75680809815f..f495d7c37fb9 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c@@ -701,6 +701,7 @@ static void __init __l2c_init(const struct l2c_init_data *data, break; case L2X0_CACHE_ID_PART_L210: + case L2X0_CACHE_ID_PART_L220: ways = (aux >> 13) & 0xf; break;
--
1.8.3.1