[PATCH v3 1/8] clk: sunxi: add clock-output-names dt property support
From: Chen-Yu Tsai <hidden>
Date: 2014-01-09 08:52:38
Subsystem:
arm/allwinner soc clock support, common clk framework, the rest · Maintainers:
Emilio López, Stephen Boyd, Brian Masney, Jerome Brunet, Linus Torvalds
sunxi clock drivers use dt node name as clock name, but clock nodes should be named clk at X, so the names would be the same. Let the drivers read clock names from dt clock-output-names property. Signed-off-by: Chen-Yu Tsai <redacted> --- drivers/clk/sunxi/clk-sunxi.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 19d9e9e..14a3774 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c@@ -53,6 +53,8 @@ static void __init sun4i_osc_clk_setup(struct device_node *node) if (of_property_read_u32(node, "clock-frequency", &rate)) return; + of_property_read_string(node, "clock-output-names", &clk_name); + /* set up gate and fixed rate properties */ gate->reg = of_iomap(node, 0); gate->bit_idx = SUNXI_OSC24M_GATE;
@@ -595,6 +597,8 @@ static void __init sunxi_mux_clk_setup(struct device_node *node, (parents[i] = of_clk_get_parent_name(node, i)) != NULL) i++; + of_property_read_string(node, "clock-output-names", &clk_name); + clk = clk_register_mux(NULL, clk_name, parents, i, CLK_SET_RATE_NO_REPARENT, reg, data->shift, SUNXI_MUX_GATE_WIDTH,
@@ -654,6 +658,8 @@ static void __init sunxi_divider_clk_setup(struct device_node *node, clk_parent = of_clk_get_parent_name(node, 0); + of_property_read_string(node, "clock-output-names", &clk_name); + clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg, data->shift, data->width, data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0,
--
1.8.5.2