From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:34:29
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
This patch set removes all hardcoded addresses from pinctrl-dove
by either requesting additional resources or requesting a syscon
provided regmap for global config registers. As this changes existing
driver to DT binding relationship, all additional resources are
probed in a backward compatible way. If the corresponding resource
cannot be found, we derive it from the existing pinctrl resource
and warn about the old DTB firmware.
Patch 1 and 2 add or update binding documentation for dove, global
config syscon, and pinctrl-dove. The latter also documents missing reg
property requirement for other mvebu pinctrl nodes.
Patch 3 and 4 add the new pinctrl reg property values and global config
register syscon to exisiting dove.dtsi.
Patch 5 fixes a misdesign of common mvebu pinctrl driver, that
requested the resource instead of getting it from the SoC specific
driver stub.
Patches 6 and 7 now add requests to the new resources in a backward
compatible way, while patches 8-11 make use of those resources.
At the end, there is no more hardcoded addresses in pinctrl-dove.
The patch set is based on pre-v3.14-rc1 mainline. I suggest to take
this in as v3.15 stuff. Since more Dove/mach-mvebu related patches
will likely follow, Jason should prepare a topic branch for LinusW
to pull from?
It has been boot tested on Dove and compile tested only for Kirkwood,
Armada 370 and XP.
Sebastian Hesselbarth (11):
devicetree: binding: add missing Marvell Dove SoC documentation
devicetree: bindings: update MVEBU pinctrl binding documentation
ARM: dove: add additional pinctrl registers
ARM: dove: add global-config register node
pinctrl: mvebu: fix misdesigned resource allocation
pinctrl: mvebu: dove: request additional resources
pinctrl: mvebu: dove: request syscon regmap for global registers
pinctrl: mvebu: dove: use remapped mpp base registers
pinctrl: mvebu: dove: use remapped mpp4 register
pinctrl: mvebu: dove: use remapped pmu_mpp registers
pinctrl: mvebu: dove: use global register regmap
.../devicetree/bindings/arm/marvell,dove.txt | 22 ++
.../pinctrl/marvell,armada-370-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
arch/arm/boot/dts/dove.dtsi | 10 +-
drivers/pinctrl/mvebu/Kconfig | 1 +
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 9 +-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 9 +-
drivers/pinctrl/mvebu/pinctrl-dove.c | 298 +++++++++++++--------
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 10 +-
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 14 +-
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 2 +-
14 files changed, 254 insertions(+), 127 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Russell King <redacted>
Cc: Linus Walleij <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
--
1.8.5.2
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:34:33
Dove pinctrl used additional registers to control MPPs. This patch first
increases existing pinctrl reg property by one register, and then adds
two new ranges for MPP4 and PMU MPP registers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Russell King <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/dove.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:34:35
Dove pinctrl binding now requires three different reg properties. This
updates corresponding binding and example accordingly. While at it, also
document reg property as required for the other MVEBU SoC pinctrl nodes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
.../devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
5 files changed, 5 insertions(+), 1 deletion(-)
@@ -5,6 +5,7 @@ part and usage. Required properties: - compatible: "marvell,88f6710-pinctrl"+- reg: register specifier of MPP registers Available mpp pins/groups and functions: Note: brackets (x) are not part of the mpp name for marvell,function and given
@@ -6,6 +6,7 @@ part and usage. Required properties: - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl", "marvell,mv78460-pinctrl"+- reg: register specifier of MPP registers This driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460.
@@ -6,6 +6,7 @@ part and usage. Required properties: - compatible: "marvell,dove-pinctrl" - clocks: (optional) phandle of pdma clock+- reg: register specifiers of MPP, MPP4, and PMU MPP registers Available mpp pins/groups and functions: Note: brackets (x) are not part of the mpp name for marvell,function and given
@@ -8,6 +8,7 @@ Required properties: "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl", "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl" "marvell,98dx4122-pinctrl"+- reg: register specifier of MPP registers This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x. It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:34:37
We share global config registers by syscon node, add it to dove.dtsi.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Russell King <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/dove.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:34:40
Now that we have a regmap for global registers, get rid of the last
remaining hardcoded physical addresses. While at it, also remove
DOVE_ prefix from those macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 128 ++++++++++++++++-------------------
1 file changed, 60 insertions(+), 68 deletions(-)
@@ -187,9 +185,10 @@ static int dove_mpp4_ctrl_set(struct mvebu_mpp_ctrl *ctrl,staticintdove_nand_ctrl_get(structmvebu_mpp_ctrl*ctrl,unsignedlong*config){-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);+unsignedintgmpp;-*config=((gmpp&DOVE_NAND_GPIO_EN)!=0);+regmap_read(gconfmap,MPP_GENERAL_CONFIG,&gmpp);+*config=((gmpp&NAND_GPIO_EN)!=0);return0;}
@@ -197,14 +196,9 @@ static int dove_nand_ctrl_get(struct mvebu_mpp_ctrl *ctrl,staticintdove_nand_ctrl_set(structmvebu_mpp_ctrl*ctrl,unsignedlongconfig){-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);--gmpp&=~DOVE_NAND_GPIO_EN;-if(config)-gmpp|=DOVE_NAND_GPIO_EN;--writel(gmpp,DOVE_MPP_GENERAL_VIRT_BASE);-+regmap_update_bits(gconfmap,MPP_GENERAL_CONFIG,+NAND_GPIO_EN,+(config)?NAND_GPIO_EN:0);return0;}
@@ -234,19 +228,23 @@ static int dove_audio0_ctrl_set(struct mvebu_mpp_ctrl *ctrl,staticintdove_audio1_ctrl_get(structmvebu_mpp_ctrl*ctrl,unsignedlong*config){-unsignedlongmpp4=readl(mpp4_base+MPP_CTRL4);-unsignedlongsspc1=readl(DOVE_SSP_CTRL_STATUS_1);-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);-unsignedlonggcfg2=readl(DOVE_GLOBAL_CONFIG_2);+unsignedintmpp4=readl(mpp4_base+MPP_CTRL4);+unsignedintsspc1;+unsignedintgmpp;+unsignedintgcfg2;++regmap_read(gconfmap,SSP_CTRL_STATUS_1,&sspc1);+regmap_read(gconfmap,MPP_GENERAL_CONFIG,&gmpp);+regmap_read(gconfmap,GLOBAL_CONFIG_2,&gcfg2);*config=0;if(mpp4&AU1_GPIO_SEL)*config|=BIT(3);-if(sspc1&DOVE_SSP_ON_AU1)+if(sspc1&SSP_ON_AU1)*config|=BIT(2);-if(gmpp&DOVE_AU1_SPDIFO_GPIO_EN)+if(gmpp&AU1_SPDIFO_GPIO_EN)*config|=BIT(1);-if(gcfg2&DOVE_TWSI_OPTION3_GPIO)+if(gcfg2&TWSI_OPTION3_GPIO)*config|=BIT(0);/* SSP/TWSI only if I2S1 not set*/
@@ -261,32 +259,22 @@ static int dove_audio1_ctrl_get(struct mvebu_mpp_ctrl *ctrl,staticintdove_audio1_ctrl_set(structmvebu_mpp_ctrl*ctrl,unsignedlongconfig){-unsignedlongmpp4=readl(mpp4_base+MPP_CTRL4);-unsignedlongsspc1=readl(DOVE_SSP_CTRL_STATUS_1);-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);-unsignedlonggcfg2=readl(DOVE_GLOBAL_CONFIG_2);+unsignedintmpp4=readl(mpp4_base+MPP_CTRL4);-/*-*clearallaudio1relatedbitsbeforeconfigure-*/-gcfg2&=~DOVE_TWSI_OPTION3_GPIO;-gmpp&=~DOVE_AU1_SPDIFO_GPIO_EN;-sspc1&=~DOVE_SSP_ON_AU1;mpp4&=~AU1_GPIO_SEL;--if(config&BIT(0))-gcfg2|=DOVE_TWSI_OPTION3_GPIO;-if(config&BIT(1))-gmpp|=DOVE_AU1_SPDIFO_GPIO_EN;-if(config&BIT(2))-sspc1|=DOVE_SSP_ON_AU1;if(config&BIT(3))mpp4|=AU1_GPIO_SEL;-writel(mpp4,mpp4_base+MPP_CTRL4);-writel(sspc1,DOVE_SSP_CTRL_STATUS_1);-writel(gmpp,DOVE_MPP_GENERAL_VIRT_BASE);-writel(gcfg2,DOVE_GLOBAL_CONFIG_2);++regmap_update_bits(gconfmap,SSP_CTRL_STATUS_1,+SSP_ON_AU1,+(config&BIT(2))?SSP_ON_AU1:0);+regmap_update_bits(gconfmap,MPP_GENERAL_CONFIG,+AU1_SPDIFO_GPIO_EN,+(config&BIT(1))?AU1_SPDIFO_GPIO_EN:0);+regmap_update_bits(gconfmap,GLOBAL_CONFIG_2,+TWSI_OPTION3_GPIO,+(config&BIT(0))?TWSI_OPTION3_GPIO:0);return0;}
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:35:05
Now that we have ioremapped pmu_mpp registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:35:43
Now that we have an ioremapped mpp4 register, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 54 +++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 26 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:35:46
Now that we have ioremapped mpp base registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 35 +++++++++++++++++++----------------
1 file changed, 19 insertions(+), 16 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:36:52
Dove pinctrl uses some global config registers to control pins.
This patch requests a syscon regmap for those registers. As this
changes DT to driver requirements, fallback to a self-registered
regmap with hardcoded resources, if the corresponding syscon DT
node is missing. Also, WARN about old DT binding usage to encourage
users to update their DTBs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/Kconfig | 1 +
drivers/pinctrl/mvebu/pinctrl-dove.c | 27 +++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
@@ -819,6 +830,22 @@ static int dove_pinctrl_probe(struct platform_device *pdev)if(IS_ERR(pmu_base))returnPTR_ERR(pmu_base);+gconfmap=syscon_regmap_lookup_by_compatible("marvell,dove-global-config");+if(IS_ERR(gconfmap)){+void__iomem*gc_base;++dev_warn(&pdev->dev,"falling back to hardcoded global registers\n");+adjust_resource(&res_fallback,+(mpp_res->start&INT_REGS_MASK)+GC_REGS_OFFS,0x14);+gc_base=devm_ioremap_resource(&pdev->dev,&res_fallback);+if(IS_ERR(gc_base))+returnPTR_ERR(gc_base);+gconfmap=devm_regmap_init_mmio(&pdev->dev,+gc_base,&gc_regmap_config);+if(IS_ERR(gconfmap))+returnPTR_ERR(gconfmap);+}+/* Warn on any missing DT resource */WARN(res_fallback.start,"Missing pinctrl regs in DTB. Please update your firmware.\n");
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:37:31
Dove pinctrl also requires additional registers to control all pins.
This patch requests resources for mpp4 and pmu-mpp register ranges.
As this changes DT to driver requirements, fallback to hardcoded
resources, if the corresponding DT regs have not been set.
Also, WARN about old DT binding usage to encourage users to update
their DTBs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 52 +++++++++++++++++++++++++++++++-----
1 file changed, 45 insertions(+), 7 deletions(-)
@@ -776,13 +785,42 @@ static int dove_pinctrl_probe(struct platform_device *pdev){conststructof_device_id*match=of_match_device(dove_pinctrl_of_match,&pdev->dev);-structresource*res;-void__iomem*base;+structresource*mpp_res,*res;+structresourceres_fallback;++mpp_res=platform_get_resource(pdev,IORESOURCE_MEM,0);+mpp_base=devm_ioremap_resource(&pdev->dev,mpp_res);+if(IS_ERR(mpp_base))+returnPTR_ERR(mpp_base);++/* prepare fallback resource */+memcpy(&res_fallback,mpp_res,sizeof(structresource));+res_fallback.start=0;++res=platform_get_resource(pdev,IORESOURCE_MEM,1);+if(!res){+dev_warn(&pdev->dev,"falling back to hardcoded MPP4 resource\n");+adjust_resource(&res_fallback,+(mpp_res->start&INT_REGS_MASK)+MPP4_REGS_OFFS,0x4);+res=&res_fallback;+}+mpp4_base=devm_ioremap_resource(&pdev->dev,res);+if(IS_ERR(mpp4_base))+returnPTR_ERR(mpp4_base);++res=platform_get_resource(pdev,IORESOURCE_MEM,2);+if(!res){+dev_warn(&pdev->dev,"falling back to hardcoded PMU resource\n");+adjust_resource(&res_fallback,+(mpp_res->start&INT_REGS_MASK)+PMU_REGS_OFFS,0x8);+res=&res_fallback;+}+pmu_base=devm_ioremap_resource(&pdev->dev,res);+if(IS_ERR(pmu_base))+returnPTR_ERR(pmu_base);-res=platform_get_resource(pdev,IORESOURCE_MEM,0);-base=devm_ioremap_resource(&pdev->dev,res);-if(IS_ERR(base))-returnPTR_ERR(base);+/* Warn on any missing DT resource */+WARN(res_fallback.start,"Missing pinctrl regs in DTB. Please update your firmware.\n");pdev->dev.platform_data=(void*)match->data;
@@ -797,7 +835,7 @@ static int dove_pinctrl_probe(struct platform_device *pdev)}clk_prepare_enable(clk);-returnmvebu_pinctrl_probe(pdev,base);+returnmvebu_pinctrl_probe(pdev,mpp_base);}staticintdove_pinctrl_remove(structplatform_device*pdev)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:37:52
Allocating the pinctrl resource in common pinctrl-mvebu was a misdesign,
as it does not allow SoC specific parts to access the allocated resource.
This moves resource allocation from mvebu_pinctrl_probe to SoC specific
_probe functions and passes the base address to common pinctrl driver
instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 9 ++++++++-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 9 ++++++++-
drivers/pinctrl/mvebu/pinctrl-dove.c | 10 +++++++++-
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 10 +++++++++-
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 14 ++++++--------
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 2 +-
6 files changed, 41 insertions(+), 13 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-25 18:38:26
Marvell Dove SoC binding was not documented, yet. Add the documentation
and also describe Global Configuration register node in it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
I chose not to send this to each DT maintainer but devicetree ml only.
Is that right or wrong now?
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
.../devicetree/bindings/arm/marvell,dove.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
@@ -0,0 +1,22 @@+Marvell Dove Platforms Device Tree Bindings+-----------------------------------------------++Boards with a Marvell Dove SoC shall have the following properties:++Required root node property:+- compatible: must contain "marvell,dove";++* Global Configuration registers++Global Configuration registers of Dove SoC are shared by a syscon node.++Required properties:+- compatible: must contain "marvell,dove-global-config" and "syscon".+- reg: base address and size of the Global Configuration registers.++Example:++gconf: global-config at e802c {+ compatible = "marvell,dove-global-config", "syscon";+ reg = <0xe802c 0x14>;+};
From: Thomas Petazzoni <hidden> Date: 2014-01-27 14:45:37
Dear Sebastian Hesselbarth,
On Sat, 25 Jan 2014 19:34:10 +0100, Sebastian Hesselbarth wrote:
Allocating the pinctrl resource in common pinctrl-mvebu was a misdesign,
as it does not allow SoC specific parts to access the allocated resource.
This moves resource allocation from mvebu_pinctrl_probe to SoC specific
_probe functions and passes the base address to common pinctrl driver
instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
I definitely agree with that: I had the same problem several months ago
when I started doing the pinctrl driver for Orion5x, which has a
non-linear MPP register set.
However, I'd like this to go a little bit further if possible. See
below.
I think there is no need to pass "base" to mvebu_pinctrl_probe(). The
only reason we have this is because the base gets stored in the
mvebu_pinctrl structure so that the mvebu_common_mpp_get() and
mvebu_common_mpp_set() functions that are the default behavior
for mvebu_pinconf_group_get() and mvebu_pinconf_group_set() work
properly.
Shouldn't we turn these functions mvebu_common_mpp_get() and
mvebu_common_mpp_set() into helper functions, accessible from the
per-SoC pinctrl drivers, so that they can easily implement their
->mpp_get() and ->mpp_set() callbacks?
This way, the "base" thing is completely owned by the per-SoC driver,
which would be more logical I believe.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-27 18:26:40
On 01/27/14 15:45, Thomas Petazzoni wrote:
On Sat, 25 Jan 2014 19:34:10 +0100, Sebastian Hesselbarth wrote:
quoted
Allocating the pinctrl resource in common pinctrl-mvebu was a misdesign,
as it does not allow SoC specific parts to access the allocated resource.
This moves resource allocation from mvebu_pinctrl_probe to SoC specific
_probe functions and passes the base address to common pinctrl driver
instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
I definitely agree with that: I had the same problem several months ago
when I started doing the pinctrl driver for Orion5x, which has a
non-linear MPP register set.
However, I'd like this to go a little bit further if possible. See
below.
I think there is no need to pass "base" to mvebu_pinctrl_probe(). The
only reason we have this is because the base gets stored in the
mvebu_pinctrl structure so that the mvebu_common_mpp_get() and
mvebu_common_mpp_set() functions that are the default behavior
for mvebu_pinconf_group_get() and mvebu_pinconf_group_set() work
properly.
Shouldn't we turn these functions mvebu_common_mpp_get() and
mvebu_common_mpp_set() into helper functions, accessible from the
per-SoC pinctrl drivers, so that they can easily implement their
->mpp_get() and ->mpp_set() callbacks?
Sounds reasonable to do so. I have a look at removing the base address
from common.c completely.
Sebastian
This way, the "base" thing is completely owned by the per-SoC driver,
which would be more logical I believe.
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:39:46
Marvell Dove SoC binding was not documented, yet. Add the documentation
and also describe Global Configuration register node in it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
.../devicetree/bindings/arm/marvell,dove.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
@@ -0,0 +1,22 @@+Marvell Dove Platforms Device Tree Bindings+-----------------------------------------------++Boards with a Marvell Dove SoC shall have the following properties:++Required root node property:+- compatible: must contain "marvell,dove";++* Global Configuration registers++Global Configuration registers of Dove SoC are shared by a syscon node.++Required properties:+- compatible: must contain "marvell,dove-global-config" and "syscon".+- reg: base address and size of the Global Configuration registers.++Example:++gconf: global-config at e802c {+ compatible = "marvell,dove-global-config", "syscon";+ reg = <0xe802c 0x14>;+};
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:39:47
Dove pinctrl used additional registers to control MPPs. This patch first
increases existing pinctrl reg property by one register, and then adds
two new ranges for MPP4 and PMU MPP registers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Russell King <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/dove.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:39:49
Dove pinctrl binding now requires three different reg properties. This
updates corresponding binding and example accordingly. While at it, also
document reg property as required for the other MVEBU SoC pinctrl nodes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
.../devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
5 files changed, 5 insertions(+), 1 deletion(-)
@@ -5,6 +5,7 @@ part and usage. Required properties: - compatible: "marvell,88f6710-pinctrl"+- reg: register specifier of MPP registers Available mpp pins/groups and functions: Note: brackets (x) are not part of the mpp name for marvell,function and given
@@ -6,6 +6,7 @@ part and usage. Required properties: - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl", "marvell,mv78460-pinctrl"+- reg: register specifier of MPP registers This driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460.
@@ -6,6 +6,7 @@ part and usage. Required properties: - compatible: "marvell,dove-pinctrl" - clocks: (optional) phandle of pdma clock+- reg: register specifiers of MPP, MPP4, and PMU MPP registers Available mpp pins/groups and functions: Note: brackets (x) are not part of the mpp name for marvell,function and given
@@ -8,6 +8,7 @@ Required properties: "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl", "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl" "marvell,98dx4122-pinctrl"+- reg: register specifier of MPP registers This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x. It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:39:51
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:39:58
With each SoC providing callbacks for every mpp pin, we can now remove
common set/get functions and unused MPP macro that cannot pass callbacks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 48 ++---------------------------------
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 12 ---------
2 files changed, 2 insertions(+), 58 deletions(-)
@@ -184,10 +147,7 @@ static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,if(!grp->ctrl)return-EINVAL;-if(grp->ctrl->mpp_get)-returngrp->ctrl->mpp_get(grp->ctrl,config);--returnmvebu_common_mpp_get(pctl,grp,config);+returngrp->ctrl->mpp_get(grp->ctrl,config);}staticintmvebu_pinconf_group_set(structpinctrl_dev*pctldev,
@@ -202,11 +162,7 @@ static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,return-EINVAL;for(i=0;i<num_configs;i++){-if(grp->ctrl->mpp_set)-ret=grp->ctrl->mpp_set(grp->ctrl,configs[i]);-else-ret=mvebu_common_mpp_set(pctl,grp,configs[i]);-+ret=grp->ctrl->mpp_set(grp->ctrl,configs[i]);if(ret)returnret;}/* for each config */
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:40:55
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:41:52
Now, that name generation has been moved, we can identify generic mpp
ranges by NULL name. To allow further redesign, remove checks for SoC
specific callbacks mpp_get/set and use NULL name instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
@@ -637,18 +637,11 @@ int mvebu_pinctrl_probe(struct platform_device *pdev, void __iomem *base)for(k=0;k<ctrl->npins;k++)ctrl->pins[k]=ctrl->pid+k;-/* special soc specific control */-if(ctrl->mpp_get||ctrl->mpp_set){-if(!ctrl->name||!ctrl->mpp_get||!ctrl->mpp_set){-dev_err(&pdev->dev,"wrong soc control info\n");-return-EINVAL;-}+/* generic mvebu register groups have no name passed */+if(!ctrl->name)+pctl->num_groups+=ctrl->npins;+elsepctl->num_groups+=1;-continue;-}--/* generic mvebu register control */-pctl->num_groups+=ctrl->npins;}pdesc=devm_kzalloc(&pdev->dev,pctl->desc.npins*
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:42:09
This adds some defines for the common mpp reg layout to mvebu pinctrl
include.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 4 ++++
1 file changed, 4 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:46:17
Passing a NULL name for pin ranges will auto-generate standard names
for each pin. With common pinctrl driver now checking NULL name correctly,
consolidate mpp pins 0-15.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 17 +----------------
1 file changed, 1 insertion(+), 16 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:46:21
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:46:23
Allocating the pinctrl resource in common pinctrl-mvebu was a misdesign,
as it does not allow SoC specific parts to access the allocated resource.
This moves resource allocation from mvebu_pinctrl_probe to SoC specific
_probe functions and temporarily passes the base address to common pinctrl
driver instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 10 +++++++++-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 10 +++++++++-
drivers/pinctrl/mvebu/pinctrl-dove.c | 11 ++++++++++-
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 11 ++++++++++-
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 14 ++++++--------
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 2 +-
6 files changed, 45 insertions(+), 13 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:46:24
Common pinctrl driver does not need to know about any addresses now,
so remove anything related to it from our pinctrl drivers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 2 +-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 2 +-
drivers/pinctrl/mvebu/pinctrl-dove.c | 2 +-
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 2 +-
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 9 +--------
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 2 +-
6 files changed, 6 insertions(+), 13 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:46:56
Now that we have ioremapped mpp base registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 35 +++++++++++++++++++----------------
1 file changed, 19 insertions(+), 16 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:47:29
Now that we have ioremapped pmu_mpp registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros. Also use common defines for MPP shift and masks and reuse
generic get/set callbacks from pmu specific get/set.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 59 +++++++++++++++++-------------------
1 file changed, 28 insertions(+), 31 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:47:43
Now that we have a regmap for global registers, get rid of the last
remaining hardcoded physical addresses. While at it, also remove
DOVE_ prefix from those macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 128 ++++++++++++++++-------------------
1 file changed, 60 insertions(+), 68 deletions(-)
@@ -206,9 +204,10 @@ static int dove_mpp4_ctrl_set(struct mvebu_mpp_ctrl *ctrl,staticintdove_nand_ctrl_get(structmvebu_mpp_ctrl*ctrl,unsignedlong*config){-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);+unsignedintgmpp;-*config=((gmpp&DOVE_NAND_GPIO_EN)!=0);+regmap_read(gconfmap,MPP_GENERAL_CONFIG,&gmpp);+*config=((gmpp&NAND_GPIO_EN)!=0);return0;}
@@ -216,14 +215,9 @@ static int dove_nand_ctrl_get(struct mvebu_mpp_ctrl *ctrl,staticintdove_nand_ctrl_set(structmvebu_mpp_ctrl*ctrl,unsignedlongconfig){-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);--gmpp&=~DOVE_NAND_GPIO_EN;-if(config)-gmpp|=DOVE_NAND_GPIO_EN;--writel(gmpp,DOVE_MPP_GENERAL_VIRT_BASE);-+regmap_update_bits(gconfmap,MPP_GENERAL_CONFIG,+NAND_GPIO_EN,+(config)?NAND_GPIO_EN:0);return0;}
@@ -253,19 +247,23 @@ static int dove_audio0_ctrl_set(struct mvebu_mpp_ctrl *ctrl,staticintdove_audio1_ctrl_get(structmvebu_mpp_ctrl*ctrl,unsignedlong*config){-unsignedlongmpp4=readl(mpp4_base+MPP_CTRL4);-unsignedlongsspc1=readl(DOVE_SSP_CTRL_STATUS_1);-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);-unsignedlonggcfg2=readl(DOVE_GLOBAL_CONFIG_2);+unsignedintmpp4=readl(mpp4_base+MPP_CTRL4);+unsignedintsspc1;+unsignedintgmpp;+unsignedintgcfg2;++regmap_read(gconfmap,SSP_CTRL_STATUS_1,&sspc1);+regmap_read(gconfmap,MPP_GENERAL_CONFIG,&gmpp);+regmap_read(gconfmap,GLOBAL_CONFIG_2,&gcfg2);*config=0;if(mpp4&AU1_GPIO_SEL)*config|=BIT(3);-if(sspc1&DOVE_SSP_ON_AU1)+if(sspc1&SSP_ON_AU1)*config|=BIT(2);-if(gmpp&DOVE_AU1_SPDIFO_GPIO_EN)+if(gmpp&AU1_SPDIFO_GPIO_EN)*config|=BIT(1);-if(gcfg2&DOVE_TWSI_OPTION3_GPIO)+if(gcfg2&TWSI_OPTION3_GPIO)*config|=BIT(0);/* SSP/TWSI only if I2S1 not set*/
@@ -280,32 +278,22 @@ static int dove_audio1_ctrl_get(struct mvebu_mpp_ctrl *ctrl,staticintdove_audio1_ctrl_set(structmvebu_mpp_ctrl*ctrl,unsignedlongconfig){-unsignedlongmpp4=readl(mpp4_base+MPP_CTRL4);-unsignedlongsspc1=readl(DOVE_SSP_CTRL_STATUS_1);-unsignedlonggmpp=readl(DOVE_MPP_GENERAL_VIRT_BASE);-unsignedlonggcfg2=readl(DOVE_GLOBAL_CONFIG_2);+unsignedintmpp4=readl(mpp4_base+MPP_CTRL4);-/*-*clearallaudio1relatedbitsbeforeconfigure-*/-gcfg2&=~DOVE_TWSI_OPTION3_GPIO;-gmpp&=~DOVE_AU1_SPDIFO_GPIO_EN;-sspc1&=~DOVE_SSP_ON_AU1;mpp4&=~AU1_GPIO_SEL;--if(config&BIT(0))-gcfg2|=DOVE_TWSI_OPTION3_GPIO;-if(config&BIT(1))-gmpp|=DOVE_AU1_SPDIFO_GPIO_EN;-if(config&BIT(2))-sspc1|=DOVE_SSP_ON_AU1;if(config&BIT(3))mpp4|=AU1_GPIO_SEL;-writel(mpp4,mpp4_base+MPP_CTRL4);-writel(sspc1,DOVE_SSP_CTRL_STATUS_1);-writel(gmpp,DOVE_MPP_GENERAL_VIRT_BASE);-writel(gcfg2,DOVE_GLOBAL_CONFIG_2);++regmap_update_bits(gconfmap,SSP_CTRL_STATUS_1,+SSP_ON_AU1,+(config&BIT(2))?SSP_ON_AU1:0);+regmap_update_bits(gconfmap,MPP_GENERAL_CONFIG,+AU1_SPDIFO_GPIO_EN,+(config&BIT(1))?AU1_SPDIFO_GPIO_EN:0);+regmap_update_bits(gconfmap,GLOBAL_CONFIG_2,+TWSI_OPTION3_GPIO,+(config&BIT(0))?TWSI_OPTION3_GPIO:0);return0;}
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:56:17
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:56:19
We share global config registers by syscon node, add it to dove.dtsi.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Russell King <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/dove.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:56:20
Now that we have an ioremapped mpp4 register, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 54 +++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 26 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 00:56:44
Dove pinctrl uses some global config registers to control pins.
This patch requests a syscon regmap for those registers. As this
changes DT to driver requirements, fallback to a self-registered
regmap with hardcoded resources, if the corresponding syscon DT
node is missing. Also, WARN about old DT binding usage to encourage
users to update their DTBs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/Kconfig | 1 +
drivers/pinctrl/mvebu/pinctrl-dove.c | 27 +++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
@@ -843,6 +854,22 @@ static int dove_pinctrl_probe(struct platform_device *pdev)if(IS_ERR(pmu_base))returnPTR_ERR(pmu_base);+gconfmap=syscon_regmap_lookup_by_compatible("marvell,dove-global-config");+if(IS_ERR(gconfmap)){+void__iomem*gc_base;++dev_warn(&pdev->dev,"falling back to hardcoded global registers\n");+adjust_resource(&res_fallback,+(mpp_res->start&INT_REGS_MASK)+GC_REGS_OFFS,0x14);+gc_base=devm_ioremap_resource(&pdev->dev,&res_fallback);+if(IS_ERR(gc_base))+returnPTR_ERR(gc_base);+gconfmap=devm_regmap_init_mmio(&pdev->dev,+gc_base,&gc_regmap_config);+if(IS_ERR(gconfmap))+returnPTR_ERR(gconfmap);+}+/* Warn on any missing DT resource */WARN(res_fallback.start,FW_BUG"Missing pinctrl regs in DTB. Please update your firmware.\n");
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 01:16:16
Dove pinctrl also requires additional registers to control all pins.
This patch requests resources for mpp4 and pmu-mpp register ranges.
As this changes DT to driver requirements, fallback to hardcoded
resources, if the corresponding DT regs have not been set.
Also, WARN about old DT binding usage to encourage users to update
their DTBs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
v1->v2:
- add FW_BUG to WARN message
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 39 +++++++++++++++++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
@@ -802,13 +809,43 @@ static int dove_pinctrl_probe(struct platform_device *pdev){conststructof_device_id*match=of_match_device(dove_pinctrl_of_match,&pdev->dev);-structresource*mpp_res;+structresource*mpp_res,*res;+structresourceres_fallback;mpp_res=platform_get_resource(pdev,IORESOURCE_MEM,0);mpp_base=devm_ioremap_resource(&pdev->dev,mpp_res);if(IS_ERR(mpp_base))returnPTR_ERR(mpp_base);+/* prepare fallback resource */+memcpy(&res_fallback,mpp_res,sizeof(structresource));+res_fallback.start=0;++res=platform_get_resource(pdev,IORESOURCE_MEM,1);+if(!res){+dev_warn(&pdev->dev,"falling back to hardcoded MPP4 resource\n");+adjust_resource(&res_fallback,+(mpp_res->start&INT_REGS_MASK)+MPP4_REGS_OFFS,0x4);+res=&res_fallback;+}+mpp4_base=devm_ioremap_resource(&pdev->dev,res);+if(IS_ERR(mpp4_base))+returnPTR_ERR(mpp4_base);++res=platform_get_resource(pdev,IORESOURCE_MEM,2);+if(!res){+dev_warn(&pdev->dev,"falling back to hardcoded PMU resource\n");+adjust_resource(&res_fallback,+(mpp_res->start&INT_REGS_MASK)+PMU_REGS_OFFS,0x8);+res=&res_fallback;+}+pmu_base=devm_ioremap_resource(&pdev->dev,res);+if(IS_ERR(pmu_base))+returnPTR_ERR(pmu_base);++/* Warn on any missing DT resource */+WARN(res_fallback.start,FW_BUG"Missing pinctrl regs in DTB. Please update your firmware.\n");+pdev->dev.platform_data=(void*)match->data;/*
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 01:56:16
MVEBU SoC pinctrl allows SoC specific drivers to pass a range of mpp
pins without a corresponding name. Each pin in this range is then
translated into a single-pin group with an auto-generated name. To allow
some redesign of the driver, move name generation for those pin ranges
down to where the groups are created.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Linus Walleij <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 22 ++++++++++++----------
1 file changed, 12 insertions(+), 10 deletions(-)
@@ -631,7 +631,6 @@ int mvebu_pinctrl_probe(struct platform_device *pdev, void __iomem *base)pctl->desc.npins=0;for(n=0;n<soc->ncontrols;n++){structmvebu_mpp_ctrl*ctrl=&soc->controls[n];-char*names;pctl->desc.npins+=ctrl->npins;/* initial control pins */
@@ -649,14 +648,6 @@ int mvebu_pinctrl_probe(struct platform_device *pdev, void __iomem *base)}/* generic mvebu register control */-names=devm_kzalloc(&pdev->dev,ctrl->npins*8,GFP_KERNEL);-if(!names){-dev_err(&pdev->dev,"failed to alloc mpp names\n");-return-ENOMEM;-}-for(k=0;k<ctrl->npins;k++)-sprintf(names+8*k,"mpp%d",ctrl->pid+k);-ctrl->name=names;pctl->num_groups+=ctrl->npins;}
@@ -689,7 +680,18 @@ int mvebu_pinctrl_probe(struct platform_device *pdev, void __iomem *base)pctl->groups[gid].npins=ctrl->npins;/* generic mvebu register control maps to a number of groups */-if(!ctrl->mpp_get&&!ctrl->mpp_set){+if(!ctrl->name){+char*names=devm_kzalloc(&pdev->dev,+ctrl->npins*8,GFP_KERNEL);+if(!names){+dev_err(&pdev->dev,"failed to alloc mpp names\n");+return-ENOMEM;+}+for(k=0;k<ctrl->npins;k++)+sprintf(names+8*k,"mpp%d",ctrl->pid+k);+ctrl->name=names;++pctl->groups[gid].name=&ctrl->name[0];pctl->groups[gid].npins=1;for(k=1;k<ctrl->npins;k++){
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-28 01:56:29
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
Unfortunately, the common pinctrl driver part has a design flaw,
that requires some restructuring. As Thomas pointed out, the redesign
taken in v1 [1] is not sufficient for possible future Orion5x SoC pinctrl.
The "common" part of the patch set therefore, overhawls MVEBU pinctrl
to remove any register mangling from the common pinctrl driver and
moves it into SoC specific drivers instead.
The "Dove" part of the patch set removes all hardcoded addresses
from pinctrl-dove by either requesting additional resources or a
syscon provided regmap for global config registers. As this changes
existing driver to DT binding relationship, all additional resources
are probed in a backward compatible way. If the corresponding resource
cannot be found, we derive it from the existing pinctrl resource and
warn about the old DTB firmware.
Patches 1 to 4 remain unchanged:
Patch 1 and 2 add or update binding documentation for dove, global
config syscon, and pinctrl-dove. The latter also documents missing reg
property requirement for other mvebu pinctrl nodes.
Patch 3 and 4 add the new pinctrl reg property values and global config
register syscon to exisiting dove.dtsi.
Patches 5-8 now prepare to fix the misdesign of common mvebu pinctrl
driver, that requested the resource instead of getting it from the SoC
specific driver stub:
Patch 5 temporarily adds passing the base address the common driver
and moves resource requests to the SoC specific drivers. Patch 6 adds
some useful mask/shift defines. Patches 7 and 8 allow to identify
mpp pin ranges by NULL mpp name instead of special get/set callbacks.
Patches 9-12 provide SoC specific callbacks for mpp ctrl registers
even if they match the standard layout. This then allows patches 13
and 14 to get rid of base addresses and the temporary address passing.
Patches 15-20 comprise the rebased hardcoded address removal for
Dove from v1. Patch 21 finally consolidates Dove pmu mpp definition
by exploiting auto-numbering of mpp names.
The patch set is still based on pre-v3.14-rc1 mainline. It has been
boot tested on Dove and compile tested only for Kirkwood, Armada 370
and XP.
[1] https://lkml.org/lkml/2014/1/25/131
Sebastian Hesselbarth (21):
devicetree: bindings: add missing Marvell Dove SoC documentation
devicetree: bindings: update MVEBU pinctrl binding documentation
ARM: dove: add additional pinctrl registers
ARM: dove: add global-config register node
pinctrl: mvebu: prepare to fix misdesigned resource allocation
pinctrl: mvebu: add common mpp reg defines to mvebu pinctrl include
pinctrl: mvebu: move generic group name generation
pinctrl: mvebu: remove checks for mpp_get/set
pinctrl: mvebu: dove: provide generic mpp callbacks
pinctrl: mvebu: kirkwood: provide generic mpp callbacks
pinctrl: mvebu: armada-370: provide generic mpp callbacks
pinctrl: mvebu: armada-xp: provide generic mpp callbacks
pinctrl: mvebu: remove unused macros and functions
pinctrl: mvebu: remove base address from common driver
pinctrl: mvebu: dove: request additional resources
pinctrl: mvebu: dove: request syscon regmap for global registers
pinctrl: mvebu: dove: use remapped mpp base registers
pinctrl: mvebu: dove: use remapped mpp4 register
pinctrl: mvebu: dove: use remapped pmu_mpp registers
pinctrl: mvebu: dove: use global register regmap
pinctrl: mvebu: dove: consolidate auto-numbered pmu mpp ranges
.../devicetree/bindings/arm/marvell,dove.txt | 22 ++
.../pinctrl/marvell,armada-370-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
arch/arm/boot/dts/dove.dtsi | 10 +-
drivers/pinctrl/mvebu/Kconfig | 1 +
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 34 +-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 38 ++-
drivers/pinctrl/mvebu/pinctrl-dove.c | 374 +++++++++++++--------
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 39 ++-
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 94 +-----
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 16 +-
14 files changed, 388 insertions(+), 246 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
---
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Russell King <redacted>
Cc: Linus Walleij <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-doc at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
--
1.8.5.2
From: Andrew Lunn <andrew@lunn.ch> Date: 2014-01-30 18:29:40
On Tue, Jan 28, 2014 at 01:39:12AM +0100, Sebastian Hesselbarth wrote:
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
Hi Sebastian
I think there might be something wrong here....
/debug/pinctrl/f1010000.pinctrl/pinconf-groups used to contain:
Pin config settings per pin group
Format: group (name): configs
0 (mpp0):current: spi(cs), available = [ gpio(io) nand(io2) ]
1 (mpp1):current: spi(mosi), available = [ gpo(o) nand(io3) ]
2 (mpp2):current: spi(sck), available = [ gpo(o) nand(io4) ]
3 (mpp3):current: spi(miso), available = [ gpo(o) nand(io5) ]
4 (mpp4):current: sata1(act), available = [ gpio(io) nand(io6) uart0(rxd) lcd(hsync) ]
5 (mpp5):current: sata0(act), available = [ gpo(o) nand(io7) uart0(txd) lcd(vsync) ]
6 (mpp6):current: sysrst(out), available = [ spi(mosi) ]
...
It now has:
Pin config settings per pin group
Format: group (name): configs
0 (mpp0):current: gpio(io), available = [ nand(io2) spi(cs) ]
1 (mpp1):current: gpo(o), available = [ nand(io3) spi(mosi) ]
2 (mpp2):current: gpo(o), available = [ nand(io4) spi(sck) ]
3 (mpp3):current: gpo(o), available = [ nand(io5) spi(miso) ]
4 (mpp4):current: gpio(io), available = [ nand(io6) uart0(rxd) sata1(act) lcd(hsync) ]
5 (mpp5):current: gpo(o), available = [ nand(io7) uart0(txd) sata0(act) lcd(vsync) ]
6 (mpp6):current: UNKNOWN, available = [ sysrst(out) spi(mosi) ]
The device i'm testing on does use spi and sata, so i would say the
old contents was correct and the new is wrong.
Andrew
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-30 18:50:44
On 01/30/2014 07:29 PM, Andrew Lunn wrote:
On Tue, Jan 28, 2014 at 01:39:12AM +0100, Sebastian Hesselbarth wrote:
quoted
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
I think there might be something wrong here....
There _is_ something wrong. I'll have a look at it. For the record,
what SoC are you testing with? From the base address, I guess it is
Kirkwood?
Sebastian
/debug/pinctrl/f1010000.pinctrl/pinconf-groups used to contain:
Pin config settings per pin group
Format: group (name): configs
0 (mpp0):current: spi(cs), available = [ gpio(io) nand(io2) ]
1 (mpp1):current: spi(mosi), available = [ gpo(o) nand(io3) ]
2 (mpp2):current: spi(sck), available = [ gpo(o) nand(io4) ]
3 (mpp3):current: spi(miso), available = [ gpo(o) nand(io5) ]
4 (mpp4):current: sata1(act), available = [ gpio(io) nand(io6) uart0(rxd) lcd(hsync) ]
5 (mpp5):current: sata0(act), available = [ gpo(o) nand(io7) uart0(txd) lcd(vsync) ]
6 (mpp6):current: sysrst(out), available = [ spi(mosi) ]
...
It now has:
Pin config settings per pin group
Format: group (name): configs
0 (mpp0):current: gpio(io), available = [ nand(io2) spi(cs) ]
1 (mpp1):current: gpo(o), available = [ nand(io3) spi(mosi) ]
2 (mpp2):current: gpo(o), available = [ nand(io4) spi(sck) ]
3 (mpp3):current: gpo(o), available = [ nand(io5) spi(miso) ]
4 (mpp4):current: gpio(io), available = [ nand(io6) uart0(rxd) sata1(act) lcd(hsync) ]
5 (mpp5):current: gpo(o), available = [ nand(io7) uart0(txd) sata0(act) lcd(vsync) ]
6 (mpp6):current: UNKNOWN, available = [ sysrst(out) spi(mosi) ]
The device i'm testing on does use spi and sata, so i would say the
old contents was correct and the new is wrong.
From: Andrew Lunn <andrew@lunn.ch> Date: 2014-01-30 20:25:15
On Thu, Jan 30, 2014 at 07:50:34PM +0100, Sebastian Hesselbarth wrote:
On 01/30/2014 07:29 PM, Andrew Lunn wrote:
quoted
On Tue, Jan 28, 2014 at 01:39:12AM +0100, Sebastian Hesselbarth wrote:
quoted
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
I think there might be something wrong here....
There _is_ something wrong. I'll have a look at it. For the record,
what SoC are you testing with? From the base address, I guess it is
Kirkwood?
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-31 02:18:58
On 01/30/2014 09:25 PM, Andrew Lunn wrote:
On Thu, Jan 30, 2014 at 07:50:34PM +0100, Sebastian Hesselbarth wrote:
quoted
On 01/30/2014 07:29 PM, Andrew Lunn wrote:
quoted
On Tue, Jan 28, 2014 at 01:39:12AM +0100, Sebastian Hesselbarth wrote:
quoted
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
I think there might be something wrong here....
There _is_ something wrong. I'll have a look at it. For the record,
what SoC are you testing with? From the base address, I guess it is
Kirkwood?
Yes, Kirkwood. Sorry for not saying.
This time I push a branch before sending out the patches. Also, I
think I'll postpone removal of hardcoded addresses until this is
sorted out. The patch set was growing way to quick and I have to
do this step-by-step for me and everybody else to actually understand ;)
So, at least the MVEBU guys should test the following branch on
their SoCs. Again, I have tested Dove and now confirmed that settings
are still correct. The others are compile-tested.
https://github.com/shesselba/linux-dove.git unstable/mvebu-pinctrl-v3.14_v3
@Thomas, Gregory: Do you think that the above branch will be
restructured enough allow support for orion5x and mv78xx0? I had a
quick look at mach-{orion5x,mv78xx0}/mpp.h and didn't see anything
weird.
Sebastian
On Tue, Jan 28, 2014 at 1:39 AM, Sebastian Hesselbarth
[off-list ref] wrote:
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
OK...
+static int dove_mpp_ctrl_get(struct mvebu_mpp_ctrl *ctrl,
+ unsigned long *config)
+{
What does this have to do with the rest of the patch?
(Maybe I'm stupid, beware I'm just glancing over this stuff as I
see the patch set is still in development.)
Yours,
Linus Walleij
On Tue, Jan 28, 2014 at 1:39 AM, Sebastian Hesselbarth
[off-list ref] wrote:
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
All this stuff is really nice, so if you can get Thomas to add his
review-tag on this stuff and maybe have some Tested-by:s
from other parties, I'd be happy to pull the end result to the
pinctrl tree, or alternatively provide my ACK for you to take this
through ARM SoC.
Yours,
Linus Walleij
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-31 10:19:28
On 01/31/14 11:13, Linus Walleij wrote:
On Tue, Jan 28, 2014 at 1:39 AM, Sebastian Hesselbarth
[off-list ref] wrote:
quoted
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
What does this have to do with the rest of the patch?
(Maybe I'm stupid, beware I'm just glancing over this stuff as I
see the patch set is still in development.)
Not really, the driver is slightly misdesigned and this patches
try to clean this up a bit. I have prepared a v3 branch for the
MVEBU guys to have a look at first.
Short version: Thanks for trying to review this, but I guess your time
would be better spent on a soon to be posted v3.
Long version:
Not having a callback identifies each control as "generic mpp pins",
so by passing a callback we make them "SoC specific" as a preparation
to remove the common "generic mpp" set/get function.
Sebastian
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-01-31 10:22:51
On 01/31/14 11:17, Linus Walleij wrote:
On Tue, Jan 28, 2014 at 1:39 AM, Sebastian Hesselbarth
[off-list ref] wrote:
quoted
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
All this stuff is really nice, so if you can get Thomas to add his
review-tag on this stuff and maybe have some Tested-by:s
from other parties, I'd be happy to pull the end result to the
pinctrl tree, or alternatively provide my ACK for you to take this
through ARM SoC.
Luckily, we have a "pinctrl/mvebu" subfolder these patches will mess
with. I think it will be better to keep then all together and take
them through the MVEBU branch. This way we can have an eye on it and
base off subsequent patches without bothering you.
I'll come back to request your ACK as soon as we have sorted it out.
Sebastian
From: Andrew Lunn <andrew@lunn.ch> Date: 2014-02-01 11:14:21
On Fri, Jan 31, 2014 at 03:18:50AM +0100, Sebastian Hesselbarth wrote:
On 01/30/2014 09:25 PM, Andrew Lunn wrote:
quoted
On Thu, Jan 30, 2014 at 07:50:34PM +0100, Sebastian Hesselbarth wrote:
quoted
On 01/30/2014 07:29 PM, Andrew Lunn wrote:
quoted
On Tue, Jan 28, 2014 at 01:39:12AM +0100, Sebastian Hesselbarth wrote:
quoted
This patch set is one required step for Dove to hop into mach-mvebu.
Until now, pinctrl-dove was hardcoding some registers that do not
directly belong to MPP core registers. This is not compatible with
what we want for mach-mvebu.
I think there might be something wrong here....
There _is_ something wrong. I'll have a look at it. For the record,
what SoC are you testing with? From the base address, I guess it is
Kirkwood?
Yes, Kirkwood. Sorry for not saying.
This time I push a branch before sending out the patches. Also, I
think I'll postpone removal of hardcoded addresses until this is
sorted out. The patch set was growing way to quick and I have to
do this step-by-step for me and everybody else to actually understand ;)
So, at least the MVEBU guys should test the following branch on
their SoCs. Again, I have tested Dove and now confirmed that settings
are still correct. The others are compile-tested.
https://github.com/shesselba/linux-dove.git unstable/mvebu-pinctrl-v3.14_v3
Hi Sebastian
Tested on Kirkwood. /debug/pinctrl is now identical with and without
the patch.
I've not looked at the actual patches, but please add a
Tested-by: Andrew Lunn <andrew@lunn.ch>
Andrew
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:00
pinctrl-mvebu allows SoCs to pass unnamed controls that will get an
auto-generated name of "mpp<PIN#>". Currently, we are allocating name
buffers on a per-control basis while looping over passed controls.
This counts the total number of unnamed controls and allocates a
global name buffer instead. The new buffer is then used while assigning
controls to pinctrl groups later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 24 +++++++++++++++++++-----
1 file changed, 19 insertions(+), 5 deletions(-)
@@ -598,6 +598,9 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)void__iomem*base;structpinctrl_pin_desc*pdesc;unsignedgid,n,k;+unsignedsize,noname=0;+char*noname_buf;+void*p;intret;if(!soc||!soc->controls||!soc->modes){
@@ -660,6 +663,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)sprintf(names+8*k,"mpp%d",ctrl->pid+k);ctrl->name=names;pctl->num_groups+=ctrl->npins;+noname+=ctrl->npins;}pdesc=devm_kzalloc(&pdev->dev,pctl->desc.npins*
@@ -673,12 +677,17 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)pdesc[n].number=n;pctl->desc.pins=pdesc;-pctl->groups=devm_kzalloc(&pdev->dev,pctl->num_groups*-sizeof(structmvebu_pinctrl_group),GFP_KERNEL);-if(!pctl->groups){-dev_err(&pdev->dev,"failed to alloc pinctrl groups\n");+/*+*allocategroupsandnamebuffersforunnamedgroups.+*/+size=pctl->num_groups*sizeof(*pctl->groups)+noname*8;+p=devm_kzalloc(&pdev->dev,size,GFP_KERNEL);+if(!p){+dev_err(&pdev->dev,"failed to alloc group data\n");return-ENOMEM;}+pctl->groups=p;+noname_buf=p+pctl->num_groups*sizeof(*pctl->groups);/* assign mpp controls to groups */gid=0;
@@ -692,15 +701,20 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)/* generic mvebu register control maps to a number of groups */if(!ctrl->mpp_get&&!ctrl->mpp_set){+pctl->groups[gid].name=noname_buf;pctl->groups[gid].npins=1;+sprintf(noname_buf,"mpp%d",ctrl->pid+0);+noname_buf+=8;for(k=1;k<ctrl->npins;k++){gid++;pctl->groups[gid].gid=gid;pctl->groups[gid].ctrl=ctrl;-pctl->groups[gid].name=&ctrl->name[8*k];+pctl->groups[gid].name=noname_buf;pctl->groups[gid].pins=&ctrl->pins[k];pctl->groups[gid].npins=1;+sprintf(noname_buf,"mpp%d",ctrl->pid+k);+noname_buf+=8;}}gid++;
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:03
This patch set restructures the common pinctrl driver part of mvebu
to allow SoC specific controls to handle their own resources. Currently,
the common driver maps a single resource passed by DT while the SoC
specific controls cannot access that resource. To achieve the removal
of knowledge of resources in the common driver, we first need to rework
how SoC specific and common get/set callbacks are handled.
The patch set is based on two patch sets sent earlier [1][2] but drops
any Dove specific removal of hardcoded addresses. This allows to have
a clear view on the structural changes now and Dove specific changes
later on. The Dove specific patches will be re-sent on top of this one,
as soon as we are all happy with the resource allcation restruturing.
Also, in the meantime, pinctrl driver stubs for new Armada 375/28x have
been posted [3]. Before any of this patches move to a stable branch, I
plan to send an updated version comprising the required patches for the
new SoCs. As the new driver stubs are very much like what we already have
for Armada 370/XP, let's only discuss the general approach now and add
the branch dependency and patches later.
Patches 1-3 first deal with the way we handle unnamed "generic" mpp
controls. Patch 1 consolidates the per-control allocation of name buffers
to counting unnamed controls first and then allocate a global name buffer
for all those controls. Patch 2 then removes the now obsolete per-control
allocation of name buffers. Patch 3 then makes the common driver to
identify "generic" mpp controls by an empty name and adds some valuable
comments about that special treatment.
Patch 4 removes passing struct mvebu_mpp_ctrl to the special callback
as the only relevant information in that struct for the callback is the
pin number which is passed directly instead.
Patches 5-9 then add some global defines and provide SoC specific
callbacks even for the "generic" mpp controls. This allows Patch 10 to
move resource allocation to SoC specific drivers and remove the common
generic callbacks in Patch 11.
Patches 12-13 finally apply some consolidation and reuse patches to
Dove SoC driver that are now possible.
The patches are still based on pre-v3.14 but still apply cleanly on
v3.14-rc2 of course. They are also available on an *unstable* branch at
https://github.com/shesselba/linux-dove.git unstable/mvebu-pinctrl-v3.14_v3
As always they have been tested on Dove, compile-tested for the others,
and Andrew was so kind to give his Tested-by for common and Kirkwood
patches.
[1] http://www.spinics.net/lists/arm-kernel/msg303496.html
[2] lkml.org/lkml/2014/1/27/562
[3] http://www.spinics.net/lists/arm-kernel/msg306409.html
Sebastian Hesselbarth (13):
pinctrl: mvebu: count unnamed controls and allocate name buffer
pinctrl: mvebu: remove obsolete per-control name buffer allocation
pinctrl: mvebu: identify generic controls by name
pinctrl: mvebu: remove passing mvebu_mpp_ctrl to callbacks
pinctrl: mvebu: add common mpp reg defines to mvebu pinctrl include
pinctrl: mvebu: dove: provide generic mpp callbacks
pinctrl: mvebu: kirkwood: provide generic mpp callbacks
pinctrl: mvebu: armada-370: provide generic mpp callbacks
pinctrl: mvebu: armada-xp: provide generic mpp callbacks
pinctrl: mvebu: move resource allocation to SoC specific drivers
pinctrl: mvebu: remove common get/set functions
pinctrl: mvebu: dove: consolidate auto-numbered pmu mpp ranges
pinctrl: mvebu: dove: reuse mpp_{set,get} in pmu callbacks
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 32 ++++++-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 32 ++++++-
drivers/pinctrl/mvebu/pinctrl-dove.c | 145 ++++++++++++++---------------
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 37 +++++++-
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 122 ++++++++----------------
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 12 ++-
6 files changed, 212 insertions(+), 168 deletions(-)
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
--
1.8.5.3
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:09
This adds some defines for the common mpp reg layout to mvebu pinctrl
include.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 4 ++++
1 file changed, 4 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:12
The only valuable information a special callback can derive from
mvebu_mpp_ctrl passed to it, is the pin id. Instead of passing
the struct, pass the pid directly.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 61 ++++++++++++++---------------------
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 8 ++---
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 8 ++---
3 files changed, 32 insertions(+), 45 deletions(-)
@@ -303,16 +293,14 @@ static int dove_audio1_ctrl_gpio_req(struct mvebu_mpp_ctrl *ctrl, u8 pid)}/* mpp[52:57] has gpio pins capable of in and out */-staticintdove_audio1_ctrl_gpio_dir(structmvebu_mpp_ctrl*ctrl,u8pid,-boolinput)+staticintdove_audio1_ctrl_gpio_dir(unsignedpid,boolinput){if(pid<52||pid>57)return-ENOTSUPP;return0;}-staticintdove_twsi_ctrl_get(structmvebu_mpp_ctrl*ctrl,-unsignedlong*config)+staticintdove_twsi_ctrl_get(unsignedpid,unsignedlong*config){unsignedlonggcfg1=readl(DOVE_GLOBAL_CONFIG_1);unsignedlonggcfg2=readl(DOVE_GLOBAL_CONFIG_2);
@@ -328,8 +316,7 @@ static int dove_twsi_ctrl_get(struct mvebu_mpp_ctrl *ctrl,return0;}-staticintdove_twsi_ctrl_set(structmvebu_mpp_ctrl*ctrl,-unsignedlongconfig)+staticintdove_twsi_ctrl_set(unsignedpid,unsignedlongconfig){unsignedlonggcfg1=readl(DOVE_GLOBAL_CONFIG_1);unsignedlonggcfg2=readl(DOVE_GLOBAL_CONFIG_2);
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:16
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins that will
be used later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:24
The way that mvebu pinctrl is designed, requesting mpp registers
in common pinctrl driver does not allow SoC specific drivers to
access this resource.
Move resource allocation in each SoC pinctrl driver and enable
already provided mpp_{set,get} callbacks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-dove.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 13 ++++++++++---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 8 --------
5 files changed, 31 insertions(+), 14 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:29
With every SoC always providing its own get/set callbacks, we can now
remove the generic ones, remove the obsolete base address, and always
use the provided callbacks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 49 ++---------------------------------
1 file changed, 2 insertions(+), 47 deletions(-)
@@ -184,10 +146,7 @@ static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,if(!grp->ctrl)return-EINVAL;-if(grp->ctrl->mpp_get)-returngrp->ctrl->mpp_get(grp->pins[0],config);--returnmvebu_common_mpp_get(pctl,grp,config);+returngrp->ctrl->mpp_get(grp->pins[0],config);}staticintmvebu_pinconf_group_set(structpinctrl_dev*pctldev,
@@ -202,11 +161,7 @@ static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,return-EINVAL;for(i=0;i<num_configs;i++){-if(grp->ctrl->mpp_set)-ret=grp->ctrl->mpp_set(grp->pins[0],configs[i]);-else-ret=mvebu_common_mpp_set(pctl,grp,configs[i]);-+ret=grp->ctrl->mpp_set(grp->pins[0],configs[i]);if(ret)returnret;}/* for each config */
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:00:54
Dove has pins that can be switched between normal and pmu functions.
Rework pmu_mpp callbacks to reuse normal mpp callbacks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 37 +++++++++++++++++-------------------
1 file changed, 17 insertions(+), 20 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:01:48
Passing a NULL name for pin ranges will auto-generate standard names
for each pin. With common pinctrl driver now checking NULL name correctly,
consolidate mpp pins 0-15.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 17 +----------------
1 file changed, 1 insertion(+), 16 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:01:50
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins that will
be used later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:02:43
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins that will
be used later. While at it, also make use of globally defined MPP
macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 48 +++++++++++++++++++++++++-----------
1 file changed, 34 insertions(+), 14 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:02:44
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins that will
be used later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:03:34
With the introduction of a global name buffer, we can now remove
the allocation and preparation of per-control name buffers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 9 ---------
1 file changed, 9 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-12 16:04:52
We treat unnamed controls as generic mvebu mpp register controls but
we identify them by not being special controls. Flip the logic and
use the name pointer as identification instead. While at it, add some
comments explaining the not so obvious treatment.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 30 ++++++++++++++++--------------
1 file changed, 16 insertions(+), 14 deletions(-)
@@ -638,23 +638,21 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)structmvebu_mpp_ctrl*ctrl=&soc->controls[n];pctl->desc.npins+=ctrl->npins;-/* initial control pins */+/* initialize control's pins[] array */for(k=0;k<ctrl->npins;k++)ctrl->pins[k]=ctrl->pid+k;-/* special soc specific control */-if(ctrl->mpp_get||ctrl->mpp_set){-if(!ctrl->name||!ctrl->mpp_get||!ctrl->mpp_set){-dev_err(&pdev->dev,"wrong soc control info\n");-return-EINVAL;-}+/*+*WeallowtopasscontrolswithNULLnamethatwetreat+*asarangeofone-pingroupswithgenericmveburegister+*controls.+*/+if(!ctrl->name){+pctl->num_groups+=ctrl->npins;+noname+=ctrl->npins;+}else{pctl->num_groups+=1;-continue;}--/* generic mvebu register control */-pctl->num_groups+=ctrl->npins;-noname+=ctrl->npins;}pdesc=devm_kzalloc(&pdev->dev,pctl->desc.npins*
@@ -690,8 +688,12 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)pctl->groups[gid].pins=ctrl->pins;pctl->groups[gid].npins=ctrl->npins;-/* generic mvebu register control maps to a number of groups */-if(!ctrl->mpp_get&&!ctrl->mpp_set){+/*+*Wetreatunnamedcontrolsasarangeofone-pingroups+*withgenericmveburegistercontrols.Useonegroupfor+*eachinthisrangeandassignadefaultgroupname.+*/+if(!ctrl->name){pctl->groups[gid].name=noname_buf;pctl->groups[gid].npins=1;sprintf(noname_buf,"mpp%d",ctrl->pid+0);
From: Thomas Petazzoni <hidden> Date: 2014-02-13 16:26:26
Dear Sebastian Hesselbarth,
Thanks again for working on this! I have boot tested this successfully
on an Armada XP platform, and it seems to behave normally, the debugfs
pinctrl contents make sense.
I have a few comments below, though.
On Wed, 12 Feb 2014 16:59:23 +0100, Sebastian Hesselbarth wrote:
Also, in the meantime, pinctrl driver stubs for new Armada 375/28x have
been posted [3]. Before any of this patches move to a stable branch, I
plan to send an updated version comprising the required patches for the
new SoCs. As the new driver stubs are very much like what we already have
for Armada 370/XP, let's only discuss the general approach now and add
the branch dependency and patches later.
I am not sure what you mean here in terms of the ordering for the
patches. I'm attaching several patches, and the first three patches
adapt your patch series to also cover 375 and 38x, assuming the pinctrl
support for 375 and 38x is merged before your patch series.
With these patches, I have
Patches 1-3 first deal with the way we handle unnamed "generic" mpp
controls. Patch 1 consolidates the per-control allocation of name buffers
to counting unnamed controls first and then allocate a global name buffer
for all those controls. Patch 2 then removes the now obsolete per-control
allocation of name buffers. Patch 3 then makes the common driver to
identify "generic" mpp controls by an empty name and adds some valuable
comments about that special treatment.
I must say I dislike quite a bit this unnamed mpp controls mechanism.
Why isn't the name statically defined in the source code by the
MPP_MODE macro, which already takes as first argument the pin number?
All the calculation of the buffer size, generating the names and so on,
looks like a lot of unnecessary code to me. But well, this unnamed
thing was already here, so I'm not saying your patch series should do
anything about it.
Patch 4 removes passing struct mvebu_mpp_ctrl to the special callback
as the only relevant information in that struct for the callback is the
pin number which is passed directly instead.
Patches 5-9 then add some global defines and provide SoC specific
callbacks even for the "generic" mpp controls. This allows Patch 10 to
move resource allocation to SoC specific drivers and remove the common
generic callbacks in Patch 11.
This is definitely good, but I'm wondering why the core cannot provide
helper functions for the generic case where we have 4 bits per pin in
contiguous registers. This would avoid duplicating the helper function
six times (you have four in your patch series, and we'll need two more
for A375 and A38x).
I've also attached other patches:
* One patch that fixes your Armada XP handling, which missed the
mv78230 and mv78260 cases (PATCH 4)
* One patch that removes MPP_REG_CTRL (PATCH 5)
* One patch that adjusts a comment in the code that was no longer true
(PATCH 6)
Feel free to squash these patches into the appropriate patches.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-13 16:41:10
On 02/13/14 17:26, Thomas Petazzoni wrote:
Thanks again for working on this! I have boot tested this successfully
on an Armada XP platform, and it seems to behave normally, the debugfs
pinctrl contents make sense.
I guess this is a Tested-by ?
I have a few comments below, though.
On Wed, 12 Feb 2014 16:59:23 +0100, Sebastian Hesselbarth wrote:
quoted
Also, in the meantime, pinctrl driver stubs for new Armada 375/28x have
been posted [3]. Before any of this patches move to a stable branch, I
plan to send an updated version comprising the required patches for the
new SoCs. As the new driver stubs are very much like what we already have
for Armada 370/XP, let's only discuss the general approach now and add
the branch dependency and patches later.
I am not sure what you mean here in terms of the ordering for the
patches. I'm attaching several patches, and the first three patches
adapt your patch series to also cover 375 and 38x, assuming the pinctrl
support for 375 and 38x is merged before your patch series.
Right. If 375/38x pinctrl goes in first (what I expect), I'd have to add
corresponding patches. You already sent them, I'll pick them up.
With these patches, I have
quoted
Patches 1-3 first deal with the way we handle unnamed "generic" mpp
controls. Patch 1 consolidates the per-control allocation of name buffers
to counting unnamed controls first and then allocate a global name buffer
for all those controls. Patch 2 then removes the now obsolete per-control
allocation of name buffers. Patch 3 then makes the common driver to
identify "generic" mpp controls by an empty name and adds some valuable
comments about that special treatment.
I must say I dislike quite a bit this unnamed mpp controls mechanism.
Why isn't the name statically defined in the source code by the
MPP_MODE macro, which already takes as first argument the pin number?
Honestly, the unnamed mpp control thing is a bit odd. But if you tell
me how to create ~60 statically defined one pin groups out of a
single-line macro, we can change that easily.
Back when that unnamed mpp control thing was invented, I must have been
to lazy to write e.g.
MPP_FUNC_CTRL(0, 0, "mpp0", armada_xp_mpp_ctrl),
MPP_FUNC_CTRL(1, 1, "mpp1", armada_xp_mpp_ctrl),
MPP_FUNC_CTRL(2, 2, "mpp2", armada_xp_mpp_ctrl),
...
MPP_FUNC_CTRL(66, 66, "mpp66", armada_xp_mpp_ctrl),
instead of
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
and generate the 66 names dynamically.
All the calculation of the buffer size, generating the names and so on,
looks like a lot of unnecessary code to me. But well, this unnamed
thing was already here, so I'm not saying your patch series should do
anything about it.
If you come up with a cool idea, we can shove it in now.
quoted
Patch 4 removes passing struct mvebu_mpp_ctrl to the special callback
as the only relevant information in that struct for the callback is the
pin number which is passed directly instead.
Patches 5-9 then add some global defines and provide SoC specific
callbacks even for the "generic" mpp controls. This allows Patch 10 to
move resource allocation to SoC specific drivers and remove the common
generic callbacks in Patch 11.
This is definitely good, but I'm wondering why the core cannot provide
helper functions for the generic case where we have 4 bits per pin in
contiguous registers. This would avoid duplicating the helper function
six times (you have four in your patch series, and we'll need two more
for A375 and A38x).
I thought about it too, but we would need a soc specific callback
anyway as you'll have to pass the base address somehow (and that is now
known by soc specific stub only). My quick rule of thumb was that the
amount of code replication would be almost the same.
I've also attached other patches:
* One patch that fixes your Armada XP handling, which missed the
mv78230 and mv78260 cases (PATCH 4)
* One patch that removes MPP_REG_CTRL (PATCH 5)
* One patch that adjusts a comment in the code that was no longer true
(PATCH 6)
Feel free to squash these patches into the appropriate patches.
Yep, thanks for these! I'll squash them in and send an updated v4 as
soon as the discussion here stalls.
Sebastian
From: Thomas Petazzoni <hidden> Date: 2014-02-13 16:59:19
Dear Sebastian Hesselbarth,
On Thu, 13 Feb 2014 17:41:02 +0100, Sebastian Hesselbarth wrote:
quoted
Thanks again for working on this! I have boot tested this successfully
on an Armada XP platform, and it seems to behave normally, the debugfs
pinctrl contents make sense.
I guess this is a Tested-by ?
Yes. My tests were admittedly fairly light, but I believe good enough :)
quoted
I am not sure what you mean here in terms of the ordering for the
patches. I'm attaching several patches, and the first three patches
adapt your patch series to also cover 375 and 38x, assuming the pinctrl
support for 375 and 38x is merged before your patch series.
Right. If 375/38x pinctrl goes in first (what I expect), I'd have to add
corresponding patches. You already sent them, I'll pick them up.
Ok, cool. Hopefully we can sort out the merging of those two patch
series for 3.15 with Linus Walleij.
quoted
I must say I dislike quite a bit this unnamed mpp controls mechanism.
Why isn't the name statically defined in the source code by the
MPP_MODE macro, which already takes as first argument the pin number?
Honestly, the unnamed mpp control thing is a bit odd. But if you tell
me how to create ~60 statically defined one pin groups out of a
single-line macro, we can change that easily.
Back when that unnamed mpp control thing was invented, I must have been
to lazy to write e.g.
MPP_FUNC_CTRL(0, 0, "mpp0", armada_xp_mpp_ctrl),
MPP_FUNC_CTRL(1, 1, "mpp1", armada_xp_mpp_ctrl),
MPP_FUNC_CTRL(2, 2, "mpp2", armada_xp_mpp_ctrl),
...
MPP_FUNC_CTRL(66, 66, "mpp66", armada_xp_mpp_ctrl),
instead of
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
and generate the 66 names dynamically.
Right. But what I meant is that we already have a place where we have
one macro call for each pin: when defining the MPP modes. So I was
thinking of simplifying the whole stuff by "merging" the notion of MPP
control with the notion of MPP mode. This way, when you do:
MPP_MODE(0,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
MPP_MODE(1,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
MPP_MODE(2,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
[...]
MPP_MODE(65,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
You can take this opportunity to generate:
{ "mpp0", ... },
{ "mpp1", ... },
{ "mpp2", ... },
...
{ "mpp65", ... },
quoted
This is definitely good, but I'm wondering why the core cannot provide
helper functions for the generic case where we have 4 bits per pin in
contiguous registers. This would avoid duplicating the helper function
six times (you have four in your patch series, and we'll need two more
for A375 and A38x).
I thought about it too, but we would need a soc specific callback
anyway as you'll have to pass the base address somehow (and that is now
known by soc specific stub only). My quick rule of thumb was that the
amount of code replication would be almost the same.
In pinctrl-mvebu.h, we could have:
static inline int default_mpp_ctrl_get(void __iomem *base, unsigned int pid, unsigned long *config)
{
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
*config = (readl(base + off) >> shift) & MVEBU_MPP_MASK;
return 0;
}
static inline int default_mpp_ctrl_set(void __iomem *base, unsigned int pid, unsigned long config)
{
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned long reg;
reg = readl(base + off) & ~(MVEBU_MPP_MASK << shift);
writel(reg | (config << shift), base + off);
return 0;
}
which would slightly reduce the per-SoC code to:
static int armada_370_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
return default_mpp_ctrl_get(mpp_base, pid, config);
}
static int armada_370_mpp_ctrl_set(unsigned pid, unsigned long config)
{
return default_mpp_ctrl_set(mpp_base, pid, config);
}
but we admittedly cannot completely remove the per-SoC function, since
the mpp_base is now only known to each per-SoC driver.
quoted
Feel free to squash these patches into the appropriate patches.
Yep, thanks for these! I'll squash them in and send an updated v4 as
soon as the discussion here stalls.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-13 17:10:55
On 02/13/14 17:59, Thomas Petazzoni wrote:
On Thu, 13 Feb 2014 17:41:02 +0100, Sebastian Hesselbarth wrote:
quoted
quoted
Thanks again for working on this! I have boot tested this successfully
on an Armada XP platform, and it seems to behave normally, the debugfs
pinctrl contents make sense.
I guess this is a Tested-by ?
Yes. My tests were admittedly fairly light, but I believe good enough :)
Ok.
quoted
quoted
I am not sure what you mean here in terms of the ordering for the
patches. I'm attaching several patches, and the first three patches
adapt your patch series to also cover 375 and 38x, assuming the pinctrl
support for 375 and 38x is merged before your patch series.
Right. If 375/38x pinctrl goes in first (what I expect), I'd have to add
corresponding patches. You already sent them, I'll pick them up.
Ok, cool. Hopefully we can sort out the merging of those two patch
series for 3.15 with Linus Walleij.
That is the plan - or rather get his Acked-by as we are lucky to have
pinctrl/mvebu and touching nothing else.
quoted
quoted
I must say I dislike quite a bit this unnamed mpp controls mechanism.
Why isn't the name statically defined in the source code by the
MPP_MODE macro, which already takes as first argument the pin number?
Honestly, the unnamed mpp control thing is a bit odd. But if you tell
me how to create ~60 statically defined one pin groups out of a
single-line macro, we can change that easily.
Back when that unnamed mpp control thing was invented, I must have been
to lazy to write e.g.
MPP_FUNC_CTRL(0, 0, "mpp0", armada_xp_mpp_ctrl),
MPP_FUNC_CTRL(1, 1, "mpp1", armada_xp_mpp_ctrl),
MPP_FUNC_CTRL(2, 2, "mpp2", armada_xp_mpp_ctrl),
...
MPP_FUNC_CTRL(66, 66, "mpp66", armada_xp_mpp_ctrl),
instead of
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
and generate the 66 names dynamically.
Right. But what I meant is that we already have a place where we have
one macro call for each pin: when defining the MPP modes. So I was
thinking of simplifying the whole stuff by "merging" the notion of MPP
control with the notion of MPP mode. This way, when you do:
MPP_MODE(0,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
MPP_MODE(1,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
MPP_MODE(2,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
[...]
MPP_MODE(65,
MPP_FUNCTION(...),
MPP_FUNCTION(...)),
You can take this opportunity to generate:
{ "mpp0", ... },
{ "mpp1", ... },
{ "mpp2", ... },
...
{ "mpp65", ... },
Ah, ok, I see. Yes that should be doable. We should definitely consider
this for later, i.e. leave it now as is and rework later.
quoted
quoted
This is definitely good, but I'm wondering why the core cannot provide
helper functions for the generic case where we have 4 bits per pin in
contiguous registers. This would avoid duplicating the helper function
six times (you have four in your patch series, and we'll need two more
for A375 and A38x).
I thought about it too, but we would need a soc specific callback
anyway as you'll have to pass the base address somehow (and that is now
known by soc specific stub only). My quick rule of thumb was that the
amount of code replication would be almost the same.
In pinctrl-mvebu.h, we could have:
static inline int default_mpp_ctrl_get(void __iomem *base, unsigned int pid, unsigned long *config)
{
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
*config = (readl(base + off) >> shift) & MVEBU_MPP_MASK;
return 0;
}
static inline int default_mpp_ctrl_set(void __iomem *base, unsigned int pid, unsigned long config)
{
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned long reg;
reg = readl(base + off) & ~(MVEBU_MPP_MASK << shift);
writel(reg | (config << shift), base + off);
return 0;
}
which would slightly reduce the per-SoC code to:
static int armada_370_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
return default_mpp_ctrl_get(mpp_base, pid, config);
}
static int armada_370_mpp_ctrl_set(unsigned pid, unsigned long config)
{
return default_mpp_ctrl_set(mpp_base, pid, config);
}
but we admittedly cannot completely remove the per-SoC function, since
the mpp_base is now only known to each per-SoC driver.
I guess I'll squash the above in for v4.. doesn't look that bad.
Sebastian
From: Thomas Petazzoni <hidden> Date: 2014-02-13 18:38:46
Dear Sebastian Hesselbarth,
On Thu, 13 Feb 2014 18:10:47 +0100, Sebastian Hesselbarth wrote:
quoted
quoted
quoted
I am not sure what you mean here in terms of the ordering for the
patches. I'm attaching several patches, and the first three patches
adapt your patch series to also cover 375 and 38x, assuming the pinctrl
support for 375 and 38x is merged before your patch series.
Right. If 375/38x pinctrl goes in first (what I expect), I'd have to add
corresponding patches. You already sent them, I'll pick them up.
Ok, cool. Hopefully we can sort out the merging of those two patch
series for 3.15 with Linus Walleij.
That is the plan - or rather get his Acked-by as we are lucky to have
pinctrl/mvebu and touching nothing else.
Right.
quoted
You can take this opportunity to generate:
{ "mpp0", ... },
{ "mpp1", ... },
{ "mpp2", ... },
...
{ "mpp65", ... },
Ah, ok, I see. Yes that should be doable. We should definitely consider
this for later, i.e. leave it now as is and rework later.
Sure, as I said, I don't think we should do all the possible
improvements right now. Your patch series is already large enough :-)
That being said, I haven't looked very closely at the Dove pinctrl
driver, and this is the one that does the most funky things, with those
cases where multiple pins are muxed with a single register control.
quoted
static int armada_370_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
return default_mpp_ctrl_get(mpp_base, pid, config);
}
static int armada_370_mpp_ctrl_set(unsigned pid, unsigned long config)
{
return default_mpp_ctrl_set(mpp_base, pid, config);
}
but we admittedly cannot completely remove the per-SoC function, since
the mpp_base is now only known to each per-SoC driver.
I guess I'll squash the above in for v4.. doesn't look that bad.
Cool, thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:26
We treat unnamed controls as generic mvebu mpp register controls but
we identify them by not being special controls. Flip the logic and
use the name pointer as identification instead. While at it, add some
comments explaining the not so obvious treatment.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Thomas Petazzoni <redacted>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 30 ++++++++++++++++--------------
1 file changed, 16 insertions(+), 14 deletions(-)
@@ -638,23 +638,21 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)structmvebu_mpp_ctrl*ctrl=&soc->controls[n];pctl->desc.npins+=ctrl->npins;-/* initial control pins */+/* initialize control's pins[] array */for(k=0;k<ctrl->npins;k++)ctrl->pins[k]=ctrl->pid+k;-/* special soc specific control */-if(ctrl->mpp_get||ctrl->mpp_set){-if(!ctrl->name||!ctrl->mpp_get||!ctrl->mpp_set){-dev_err(&pdev->dev,"wrong soc control info\n");-return-EINVAL;-}+/*+*WeallowtopasscontrolswithNULLnamethatwetreat+*asarangeofone-pingroupswithgenericmveburegister+*controls.+*/+if(!ctrl->name){+pctl->num_groups+=ctrl->npins;+noname+=ctrl->npins;+}else{pctl->num_groups+=1;-continue;}--/* generic mvebu register control */-pctl->num_groups+=ctrl->npins;-noname+=ctrl->npins;}pdesc=devm_kzalloc(&pdev->dev,pctl->desc.npins*
@@ -690,8 +688,12 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)pctl->groups[gid].pins=ctrl->pins;pctl->groups[gid].npins=ctrl->npins;-/* generic mvebu register control maps to a number of groups */-if(!ctrl->mpp_get&&!ctrl->mpp_set){+/*+*Wetreatunnamedcontrolsasarangeofone-pingroups+*withgenericmveburegistercontrols.Useonegroupfor+*eachinthisrangeandassignadefaultgroupname.+*/+if(!ctrl->name){pctl->groups[gid].name=noname_buf;pctl->groups[gid].npins=1;sprintf(noname_buf,"mpp%d",ctrl->pid+0);
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:28
With the introduction of a global name buffer, we can now remove
the allocation and preparation of per-control name buffers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Thomas Petazzoni <redacted>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 9 ---------
1 file changed, 9 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:30
pinctrl-mvebu allows SoCs to pass unnamed controls that will get an
auto-generated name of "mpp<PIN#>". Currently, we are allocating name
buffers on a per-control basis while looping over passed controls.
This counts the total number of unnamed controls and allocates a
global name buffer instead. The new buffer is then used while assigning
controls to pinctrl groups later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Thomas Petazzoni <redacted>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 24 +++++++++++++++++++-----
1 file changed, 19 insertions(+), 5 deletions(-)
@@ -598,6 +598,9 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)void__iomem*base;structpinctrl_pin_desc*pdesc;unsignedgid,n,k;+unsignedsize,noname=0;+char*noname_buf;+void*p;intret;if(!soc||!soc->controls||!soc->modes){
@@ -660,6 +663,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)sprintf(names+8*k,"mpp%d",ctrl->pid+k);ctrl->name=names;pctl->num_groups+=ctrl->npins;+noname+=ctrl->npins;}pdesc=devm_kzalloc(&pdev->dev,pctl->desc.npins*
@@ -673,12 +677,17 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)pdesc[n].number=n;pctl->desc.pins=pdesc;-pctl->groups=devm_kzalloc(&pdev->dev,pctl->num_groups*-sizeof(structmvebu_pinctrl_group),GFP_KERNEL);-if(!pctl->groups){-dev_err(&pdev->dev,"failed to alloc pinctrl groups\n");+/*+*allocategroupsandnamebuffersforunnamedgroups.+*/+size=pctl->num_groups*sizeof(*pctl->groups)+noname*8;+p=devm_kzalloc(&pdev->dev,size,GFP_KERNEL);+if(!p){+dev_err(&pdev->dev,"failed to alloc group data\n");return-ENOMEM;}+pctl->groups=p;+noname_buf=p+pctl->num_groups*sizeof(*pctl->groups);/* assign mpp controls to groups */gid=0;
@@ -692,15 +701,20 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)/* generic mvebu register control maps to a number of groups */if(!ctrl->mpp_get&&!ctrl->mpp_set){+pctl->groups[gid].name=noname_buf;pctl->groups[gid].npins=1;+sprintf(noname_buf,"mpp%d",ctrl->pid+0);+noname_buf+=8;for(k=1;k<ctrl->npins;k++){gid++;pctl->groups[gid].gid=gid;pctl->groups[gid].ctrl=ctrl;-pctl->groups[gid].name=&ctrl->name[8*k];+pctl->groups[gid].name=noname_buf;pctl->groups[gid].pins=&ctrl->pins[k];pctl->groups[gid].npins=1;+sprintf(noname_buf,"mpp%d",ctrl->pid+k);+noname_buf+=8;}}gid++;
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:52
From: Thomas Petazzoni <redacted>
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later.
Signed-off-by: Thomas Petazzoni <redacted>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
v3->v4:
- also take care of new Armada 375 pinctrl driver
- use generic mpp helpers (Suggested by Thomas Petazzoni)
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-375.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:53
The way that mvebu pinctrl is designed, requesting mpp registers
in common pinctrl driver does not allow SoC specific drivers to
access this resource.
Move resource allocation in each SoC pinctrl driver and enable
already provided mpp_{set,get} callbacks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thomas Petazzoni <redacted>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Thomas Petazzoni <redacted>
---
Changelog:
v3->v4:
- fixup missing mv78230 and mv78260 Armada XP conversion
(Reported by Thomas Petazzoni)
- also take care of new Armada 375 and 38x drivers
(Suggested by Thomas Petazzoni)
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-armada-375.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 12 +++++++++---
drivers/pinctrl/mvebu/pinctrl-dove.c | 8 +++++++-
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 13 ++++++++++---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 8 --------
7 files changed, 47 insertions(+), 18 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:55
From: Thomas Petazzoni <redacted>
Now that each per-SoC pinctrl driver must implement its own get/set
functions, there is no point in keeping the MPP_REG_CTRL macro, whose
purpose was to let the core pinctrl mvebu driver use default get/set
functions. While at it also update the comment about mvebu_mpp_ctrl.
Signed-off-by: Thomas Petazzoni <redacted>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-mvebu.h | 19 +++----------------
1 file changed, 3 insertions(+), 16 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:57
Dove has pins that can be switched between normal and pmu functions.
Rework pmu_mpp callbacks to reuse default mpp ctrl helpers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
v3->v4:
- directly use generic mpp helpers instead of normal dove mpp functions
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 37 +++++++++++++++++-------------------
1 file changed, 17 insertions(+), 20 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:21:59
Passing a NULL name for pin ranges will auto-generate standard names
for each pin. With common pinctrl driver now checking NULL name correctly,
consolidate mpp pins 0-15.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 17 +----------------
1 file changed, 1 insertion(+), 16 deletions(-)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:22:01
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
Changelog:
v3->v4:
- use generic mpp helpers (Suggested by Thomas Petazzoni)
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:22:06
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
v3->v4:
- use generic mpp helpers (Suggested by Thomas Petazzoni)
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: 2014-02-23 14:22:08
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks that use generic mpp pins helper
and will be used later. While at it, also make use of globally defined
MPP macros.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
v3->v4:
- use generic mpp helpers (Suggested by Thomas Petazzoni)
Cc: Linus Walleij <redacted>
Cc: Jason Cooper <redacted>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <redacted>
Cc: Thomas Petazzoni <redacted>
Cc: Ezequiel Garcia <redacted>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 36 ++++++++++++++++++++++--------------
1 file changed, 22 insertions(+), 14 deletions(-)