[PATCH 1/3] clk: samsung: exynos5250: Fix ACP gate register offset

The CLK_GATE_IP_ACP register offset is incorrectly listed.
Fix this and the register ordering as well.

Signed-off-by: Abhilash Kesavan <redacted>
---
 drivers/clk/samsung/clk-exynos5250.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index adf3234..cbba4a8 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c

@@ -25,6 +25,7 @@
 #define MPLL_LOCK		0x4000
 #define MPLL_CON0		0x4100
 #define SRC_CORE1		0x4204
+#define GATE_IP_ACP		0x8800
 #define CPLL_LOCK		0x10020
 #define EPLL_LOCK		0x10030
 #define VPLL_LOCK		0x10040

@@ -75,7 +76,6 @@
 #define SRC_CDREX		0x20200
 #define PLL_DIV2_SEL		0x20a24
 #define GATE_IP_DISP1		0x10928
-#define GATE_IP_ACP		0x10000
 
 /* list of PLLs to be registered */
 enum exynos5250_plls {

-- 
1.7.9.5

Adds gate clock for MDMA0 on Exynos5250 SoC.

Signed-off-by: Abhilash Kesavan <redacted>
---
 .../devicetree/bindings/clock/exynos5250-clock.txt |    2 ++
 drivers/clk/samsung/clk-exynos5250.c               |    5 ++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 24765c1..5883ec8 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt

@@ -159,6 +159,8 @@ clock which they consume.
   mixer			343
   hdmi			344
   g2d			345
+  mdma0			346
+  smmu_mdma0		347
 
 
    [Clock Muxes]

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index cbba4a8..27ffe2f 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c

@@ -120,7 +120,8 @@ enum exynos5250_clks {
 	spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2,
 	hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1,
 	tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct,
-	wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d,
+	wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, mdma0,
+	smmu_mdma0,
 
 	/* mux clocks */
 	mout_hdmi = 1024,

@@ -492,6 +493,8 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
 	GATE(mixer, "mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 5, 0, 0),
 	GATE(hdmi, "hdmi", "mout_aclk200_disp1", GATE_IP_DISP1, 6, 0, 0),
 	GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
+	GATE(mdma0, "mdma0", "aclk266", GATE_IP_ACP, 1, 0, 0),
+	GATE(smmu_mdma0, "smmu_mdma0", "aclk266", GATE_IP_ACP, 5, 0, 0),
 };
 
 static struct samsung_pll_rate_table vpll_24mhz_tbl[] __initdata = {

-- 
1.7.9.5

Fix wrong clock number in mdma0 node.

Signed-off-by: Abhilash Kesavan <redacted>
---
 arch/arm/boot/dts/exynos5250.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..177becd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi

@@ -559,7 +559,7 @@
 			compatible = "arm,pl330", "arm,primecell";
 			reg = <0x10800000 0x1000>;
 			interrupts = <0 33 0>;
-			clocks = <&clock 271>;
+			clocks = <&clock 346>;
 			clock-names = "apb_pclk";
 			#dma-cells = <1>;
 			#dma-channels = <8>;

-- 
1.7.9.5

Hi Kukjin,

On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:

Can we have your ack for this patch?

I'd like to apply the whole series into samsung-clk fixes branch and
send a pull request to Mike to get it and one more fix into his tree.

Best regards,
Tomasz

On 12/18/13 23:49, Tomasz Figa wrote:

Hi Kukjin,

Hi,

On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:

quoted

Fix wrong clock number in mdma0 node.

Signed-off-by: Abhilash Kesavan<redacted>
---
  arch/arm/boot/dts/exynos5250.dtsi |    2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..177becd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi

@@ -559,7 +559,7 @@
  			compatible = "arm,pl330", "arm,primecell";
  			reg =<0x10800000 0x1000>;
  			interrupts =<0 33 0>;
-			clocks =<&clock 271>;
+			clocks =<&clock 346>;
  			clock-names = "apb_pclk";
  			#dma-cells =<1>;
  			#dma-channels =<8>;

Can we have your ack for this patch?

Sure, please feel free to add my ack on this series.

Acked-by: Kukjin Kim <redacted>

I'd like to apply the whole series into samsung-clk fixes branch and
send a pull request to Mike to get it and one more fix into his tree.

I'm fine, thanks.

- Kukjin

Quoting Tomasz Figa (2013-12-18 06:49:10)

Hi Kukjin,

On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:

quoted

Fix wrong clock number in mdma0 node.

Signed-off-by: Abhilash Kesavan <redacted>
---
 arch/arm/boot/dts/exynos5250.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..177becd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi

@@ -559,7 +559,7 @@
                      compatible = "arm,pl330", "arm,primecell";
                      reg = <0x10800000 0x1000>;
                      interrupts = <0 33 0>;
-                     clocks = <&clock 271>;
+                     clocks = <&clock 346>;
                      clock-names = "apb_pclk";
                      #dma-cells = <1>;
                      #dma-channels = <8>;

Can we have your ack for this patch?

I'd like to apply the whole series into samsung-clk fixes branch and
send a pull request to Mike to get it and one more fix into his tree.

Do these fixes need to go into the current -rc fixes cycle or can they
go for 3.14?

Regards,
Mike

Best regards,
Tomasz

Hi Mike,

On Wednesday 18 of December 2013 11:32:03 Mike Turquette wrote:

Quoting Tomasz Figa (2013-12-18 06:49:10)

quoted

Hi Kukjin,

On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:

quoted

Fix wrong clock number in mdma0 node.

Signed-off-by: Abhilash Kesavan <redacted>
---
 arch/arm/boot/dts/exynos5250.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..177becd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi

@@ -559,7 +559,7 @@
                      compatible = "arm,pl330", "arm,primecell";
                      reg = <0x10800000 0x1000>;
                      interrupts = <0 33 0>;
-                     clocks = <&clock 271>;
+                     clocks = <&clock 346>;
                      clock-names = "apb_pclk";
                      #dma-cells = <1>;
                      #dma-channels = <8>;

Can we have your ack for this patch?

I'd like to apply the whole series into samsung-clk fixes branch and
send a pull request to Mike to get it and one more fix into his tree.

Do these fixes need to go into the current -rc fixes cycle or can they
go for 3.14?

I'd say that this should go as an -rc fix, because on some systems on
which the firmware may leave the mdma0 clock disabled by default,
trying to initialize MDMA0 by PL330 driver might cause booting failure.

Can we get your ack on this, so I could apply this and send you a pull
request with all fixes?

Best regards,
Tomasz