Hi Will,


On Mon, Dec 9, 2013 at 10:20 PM, Will Deacon [off-list ref] wrote:

Hi Vinayak,

On Wed, Dec 04, 2013 at 10:09:51AM +0000, Vinayak Kale wrote:

quoted

Add support for irq registration when pmu interrupt is percpu.

Getting closer...

quoted

Signed-off-by: Vinayak Kale <redacted>
Signed-off-by: Tuan Phan <redacted>
---
 arch/arm64/kernel/perf_event.c |  108 +++++++++++++++++++++++++++++-----------
 1 file changed, 78 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index cea1594..d8e6667 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c

@@ -22,6 +22,7 @@

 #include <linux/bitmap.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/export.h>
 #include <linux/perf_event.h>

@@ -363,26 +364,52 @@ validate_group(struct perf_event *event)
 }

 static void
+armpmu_disable_percpu_irq(void *data)
+{
+     disable_percpu_irq((long)data);
+}

Given that we wait for the CPUs to finish enabling/disabling the IRQ, I
actually meant pass the pointer to the IRQ, which removes the horrible
casts in the caller.

quoted

+     if (irq_is_percpu(irq)) {
+             cpumask_clear(&armpmu->active_irqs);

Thanks for moving the mask manipulation out. It now makes it obvious that we
don't care about the mask at all for PPIs, so that can be removed (the code
you have is racy against hotplug anyway).

I took the liberty of writing a fixup for you (see below). Can you test it
on your platform please?

Below fixup works fine on APM platform.
Do you want me to send this fixup as part of next revision of the
patch or will you apply it yourself? (For later case, you have my ack)

Acked-by: Vinayak Kale <redacted>