[PATCH v3 04/14] ARM: mvebu: Remove the unused argument of set_cpu_coherent()

[PATCH v3 00/14] CPU idle for Armada XP · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 01/14] ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 02/14] ARM: mvebu: ll_set_cpu_coherent no more uses the coherency address as parameter · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 02/14] ARM: mvebu: ll_set_cpu_coherent no more uses the coherency address as parameter · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 03/14] ARM: mvebu: ll_set_cpu_coherent always uses the current CPU · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 03/14] ARM: mvebu: ll_set_cpu_coherent always uses the current CPU · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 04/14] ARM: mvebu: Remove the unused argument of set_cpu_coherent() · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 04/14] ARM: mvebu: Remove the unused argument of set_cpu_coherent() · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 05/14] ARM: mvebu: Make ll_set_cpu_coherent() more configurable · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 05/14] ARM: mvebu: Make ll_set_cpu_coherent() more configurable · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 06/14] ARM: mvebu: Low level functions to disable cache snooping · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 06/14] ARM: mvebu: Low level functions to disable cache snooping · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 07/14] ARM: mvebu: Add a new set of registers for pmsu · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 07/14] ARM: mvebu: Add a new set of registers for pmsu · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 07/14] ARM: mvebu: Add a new set of registers for pmsu · Jason Cooper <hidden> · 2013-10-14
[PATCH v3 08/14] ARM: mvebu: Allow to power down L2 cache controller in idle mode · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 08/14] ARM: mvebu: Allow to power down L2 cache controller in idle mode · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 09/14] ARM: mvebu: Add the PMSU related part of the cpu idle functions · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 09/14] ARM: mvebu: Add the PMSU related part of the cpu idle functions · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 10/14] ARM: mvebu: Set the start address of a CPU in a separate function · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 11/14] ARM: mvebu: Add CPU idle low level support for Marvell Armada XP · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 11/14] ARM: mvebu: Add CPU idle low level support for Marvell Armada XP · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 12/14] cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 12/14] cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC · Thomas Petazzoni <hidden> · 2013-10-14
[PATCH v3 12/14] cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC · Daniel Lezcano <hidden> · 2013-10-17
[PATCH v3 13/14] ARM: mvebu: register the cpuidle driver for the Armada XP SoCs · Gregory CLEMENT <hidden> · 2013-10-14
[PATCH v3 14/14] ARM: dts: mvebu: Add a new set of registers to the PMSU node · Gregory CLEMENT <hidden> · 2013-10-14

STALE4638d REVIEWED: 1 (0M)

From: Thomas Petazzoni <hidden>
Date: 2013-10-14 14:23:58
Also in: linux-pm

Dear Gregory CLEMENT,

On Mon, 14 Oct 2013 15:58:16 +0200, Gregory CLEMENT wrote:

set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always use the SMP group 0. So

use -> uses

But probably better: "But this parameter was never used, and all CPUs
are always joining the SMP group 0".

Other than that:

Reviewed-by: Thomas Petazzoni <redacted>
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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