[PATCHv8 18/36] ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock
From: Tero Kristo <hidden>
Date: 2013-10-09 15:30:49
Also in:
linux-devicetree, linux-omap
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: J Keerthy <j-keerthy@ti.com> This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <redacted> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index c830e15..75d5e1b 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi@@ -348,13 +348,10 @@ apll_pcie_clkvcoldo_div: apll_pcie_clkvcoldo_div { apll_pcie_m2_ck: apll_pcie_m2_ck at 4a008224 { #clock-cells = <0>; - compatible = "ti,divider-clock"; + compatible = "fixed-factor-clock"; clocks = <&apll_pcie_ck>; - ti,max-div = <127>; - ti,autoidle-shift = <8>; - reg = <0x4a008224 0x4>; - ti,index-starts-at-one; - ti,autoidle-low; + clock-mult = <1>; + clock-div = <1>; }; sys_clk1_dclk_div: sys_clk1_dclk_div at 4ae061c8 {
--
1.7.9.5