[PATCH 02/10] clk: sunxi: add gating support to PLL1
From: Maxime Ripard <hidden>
Date: 2013-09-30 17:05:19
On Sun, Sep 29, 2013 at 12:49:31AM -0300, Emilio L?pez wrote:
This commit adds gating support to PLL1 on the clock driver. This makes the PLL1 implementation fully compatible with PLL4 as well. Signed-off-by: Emilio L?pez <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <redacted> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130930/a3f92ed2/attachment.sig>