Thread (22 messages) 22 messages, 6 authors, 2013-09-30

imprecise external abort using the flexcan driver on i.MX6Q

From: Lothar Waßmann <hidden>
Date: 2013-09-30 11:37:09
Also in: linux-can

Hi,

Marc Kleine-Budde writes:
On 09/30/2013 01:06 PM, Lothar Wa?mann wrote:
quoted
Hi,

Marc Kleine-Budde writes:
quoted
On 09/27/2013 07:24 PM, Matt Sealey wrote:
quoted
Marc - I don't think FLEXCAN has changed layout at all in these areas.
The hardware always worked this way..
All flexcan cores support the RX FIFO, the mx6 supports an additional
mode for different acceptance filters.
quoted
The only difference here  is that the i.MX53 is doing something weird
on the bus. The i.MX6Q is giving the absolutely correct BRESP for the
transfer to the peripheral (in effect, a "go away, this is my data"
failure, which the CPU turns into an imprecise abort since it no idea
which transaction it committed aeons ago caused it).

Writes to 0x90 to 0xDF while MCR[FEN] is set *should* cause a data
abort.. because it's not even a read-only region, it *should* be
totally inaccessible to the CPU.

The question I have is, when MCR[FEN] is set on i.MX53, does reading
from those reserved registers give anything but 0's or garbage? I'm
curious, that's all, it doesn't really matter ;)
The driver only read from message buffer 0, and uses buffer 8 for tx.
The others are not accessed, unless in that chip start routine. We don't
need this loop, it comes from the original driver. I think no one has
ever noticed that bug, because all other CPUs have not complained.

The driver without the loop is working on mx6 and Lothar is testing it
on mx53.
I can confirm, that the driver still works on i.MX53 as before the
patch.
Is someone going to prepare a patch, or should I do it, as I was the
one who first brought up this issue?
I have a patch ready, it's basically what I send you. Can I add your
Tested-by?
Yes, of course.


Lothar Wa?mann
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