Hello Huang,

Huang Shijie wrote on?2013-09-05:

On Wed, Sep 04, 2013 at 12:33:22PM +0100, Mark Brown wrote:

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On Wed, Sep 04, 2013 at 06:29:34PM +0800, Huang Shijie wrote:

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? 2013?09?04? 17:55, Mark Brown ??:

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On Wed, Sep 04, 2013 at 10:16:09AM +0800, Huang Shijie wrote:

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Since this quadspi driver depends on the mtd code, could this driver
goes to the kernel by
the l2-mtd tree?

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Why would a SPI driver depend on MTD?

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The patch 1-4 are for m25p80.c, and this quadspi controller drivers
depends on the
patch 1-4.

In what way does the controller driver depend on those changes?

This driver needs the spi nor command to fill the LUT register, such as
OPCODE_WREN(0x06), so the patch 1 moves the spi nor command to a seprate
header spi-nor.h, and this driver includes this new header.

Then some questions come up: 
- Why does the spi controller need to know this?
- What is this LUT register at all?
- What happens if something different that a flash is connected and 
   the data starts with one of these opcodes?

Best Regards,
Thomas