Thread (10 messages) 10 messages, 3 authors, 2013-08-29

[PATCHv3 1/4] arm: dts: Add clock entries for timers in SOCFPGA

From: Steffen Trumtrar <hidden>
Date: 2013-08-28 15:31:27
Also in: linux-devicetree

Hi!

On Wed, Aug 21, 2013 at 03:53:44PM -0500, dinguyen at altera.com wrote:
quoted hunk ↗ jump to hunk
From: Dinh Nguyen <redacted>

Set the correct clock entries for the the timers, and also clean up
the timer entries for SOCFPGA by removing timer<n> in the timer entry.

Signed-off-by: Dinh Nguyen <redacted>
CC: Rob Herring <redacted>
Cc: Pawel Moll <redacted>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <redacted>
Cc: Ian Campbell <redacted>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <redacted>
CC: Jamie Iles <redacted>
Cc: John Stultz <redacted>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Pavel Machek <redacted>
Cc: devicetree at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
---
 arch/arm/boot/dts/socfpga.dtsi         |   16 ++++++++--------
 arch/arm/boot/dts/socfpga_cyclone5.dts |    8 ++++----
 arch/arm/boot/dts/socfpga_vt.dts       |    8 ++++----
 3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 9706767..9957bae 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -26,10 +26,6 @@
 		ethernet1 = &gmac1;
 		serial0 = &uart0;
 		serial1 = &uart1;
-		timer0 = &timer0;
-		timer1 = &timer1;
-		timer2 = &timer2;
-		timer3 = &timer3;
 	};
Yes. Do that.
quoted hunk ↗ jump to hunk
 	cpus {
@@ -486,28 +482,32 @@
 			interrupts = <1 13 0xf04>;
 		};
 
-		timer0: timer0 at ffc08000 {
+		timer at ffc08000 {
No. Why? Than I can not write something like

&timer0 {
	clock-frequency = <100000000>;
};

and would have to reference the whole tree ala

/ {
	soc {
		timer at ffc08000 {
			clock-frequency = <100000000>;
		};
	};
};

in a boardspecific or SoC specific file (see below).
quoted hunk ↗ jump to hunk
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
index 698dde9..c1af01c 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
 
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 6f23121..72ff14c 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
Leads me to a question about terminology: Is the cyclone5 an actual board?
AFAIK it is. And the Cyclone 5 FPGA is also called socfpga? Is that correct?
But then, seeing that, in an other patch, you add two different sysmgr addresses to
the socfpga_vt and socfpga_cyclone5, there are different socfpgas?

I want to write a devicetree for the SoCkit. It has a Cyclone 5 on it.
So naturally I would now go and include the socfpga_cyclone5.dtsi, with all the
cyclone5 stuff and just add my board specific stuff in a socfpga_sockit.dts.
But there is no socfpga_cyclone5.dtsi, just the socfpga_cyclone5.dts, which itself
seems to be a board...

So, how should we reorder the current dts (as I tested with current mainline, the
support is completely broken out of the box, but works fine with your patches that
are floating around, there should be no users as of now)?

Something like:

socfpga.dtsi
 -> socfpga_cyclone5.dtsi
 --> socfpga_cyclone5_devboard.dts (?)
 --> socfpga_sockit.dts
 -> socfpga_???.dtsi
 --> socfpga_vt.dts

?

Thanks and regards,
Steffen

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