Thread (39 messages) 39 messages, 8 authors, 2013-09-03

[PATCH 4/4] Documentation: Add device tree bindings for Freescale FTM PWM

From: Thierry Reding <hidden>
Date: 2013-08-23 09:23:52
Also in: linux-pwm, lkml

On Wed, Aug 21, 2013 at 11:07:42AM +0800, Xiubo Li wrote:
Signed-off-by: Xiubo Li <redacted>
---
 .../devicetree/bindings/pwm/fsl-ftm-pwm.txt        | 52 ++++++++++++++++++++++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/fsl-ftm-pwm.txt
It used to be that device tree bindings documentation was squashed into
the same commit as the driver. I see some point in splitting this up
given that this will eventually go into a completely separate tree, but
I just want to make sure this is now the official way of splitting
patches so I can tell that to people in good conscience.
quoted hunk ↗ jump to hunk
diff --git a/Documentation/devicetree/bindings/pwm/fsl-ftm-pwm.txt b/Documentation/devicetree/bindings/pwm/fsl-ftm-pwm.txt
new file mode 100644
index 0000000..698965b
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/fsl-ftm-pwm.txt
@@ -0,0 +1,52 @@
+Freescale FTM PWM controller
+
+Required properties:
+- compatible: should be "fsl,vf610-ftm-pwm"
+- reg: physical base address and length of the controller's registers
+- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
+  First cell specifies the per-chip channel index of the PWM to use, the
+  second cell is the period in nanoseconds and bit 0 in the third cell is
+  used to encode the polarity of PWM output. Set bit 0 of the third in PWM
+  specifier to 1 for inverse polarity & set to 0 for normal polarity.
+- fsl,pwm-clk-ps: the ftm0 pwm clock's prescaler, divide-by 2^n(n = 0 ~ 7).
+- fsl,pwm-cpwm: Center-Aligned PWM (CPWM) mode.
+- fsl,pwm-number: the number of PWM devices, and is must equal to the number
+  of "fsl,pwm-channels".
+- fsl,pwm-channels: the channels' order which is be used for pwm in ftm0
+  module, and they must be one or some of 0 ~ 7, because the ftm0 only has
+  8 channels can be used.
+- for very channel, the revlatived the pinctrl should be at least two state
+  {"enN", "dsN"}, which "en" means "enable", "ds" means "disable" and "N"
+  means the order of the channel.
This is missing a description of the clocks and clock-names properties.
+
+Example:
+
+pwm0: pwm at 40038000 {
+	      compatible = "fsl,vf610-ftm-pwm";
+	      reg = <0x40038000 0x1000>;
+	      #pwm-cells = <3>;
+	      pinctrl-names = "en0", "ds0", "en3", "ds3";
+	      pinctrl-0 = <&pinctrl_pwm0_ch0_en>;
+	      pinctrl-1 = <&pinctrl_pwm0_ch0_ds>;
+	      pinctrl-2 = <&pinctrl_pwm0_ch3_en>;
+	      pinctrl-3 = <&pinctrl_pwm0_ch3_ds>;
+	      fsl,pwm-clk-ps = <7>;
+	      fsl,pwm-cpwm = <0>;
+	      fsl,pwm-number = <2>;
+	      fsl,pwm-channels = <0 3>;
+	      ...
And this mixes tabs and spaces for indentation.
+      };
+
+leds {
+	compatible = "pwm-leds";
+	led {
+		label = "fsl_led";
+		pwms = <&pwm0 0 10000000 0>;
+		max-brightness = <127>;
+	};
+	backlight {
+		label = "fsl_backlight";
+		pwms = <&pwm0 3 10000000 1>;
+		max-brightness = <100>;
+	};
I don't think I like this at all. This example suggests to use the
pwm-leds driver for backlight control. Why not use pwm-backlight
instead?

Thierry
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