On Wednesday 31 July 2013 10:35 AM, Joel Fernandes wrote:

On 07/30/2013 03:29 AM, Sekhar Nori wrote:

quoted

On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:

quoted

We certainly don't want error conditions to be cleared anywhere

'anywhere' is a really loaded term.

quoted

as this will make us 'forget' about missed events. We depend on
knowing which events were missed in order to be able to reissue them.

quoted

This fixes a race condition where the EMR was being cleared
by the transfer completion interrupt handler.

Basically, what was happening was:

            Missed event
             |
             |
             V
SG1-SG2-SG3-Null
         \
          \__TC Interrupt (Almost same time as ARM is executing
TC interrupt handler, an event got missed and also forgotten
by clearing the EMR).

Sorry, but I dont see how edma_stop() is coming into picture in the race
you describe?

In edma_callback function, for the case of DMA_COMPLETE (Transfer
completion interrupt), edma_stop() is called when all sets have been
processed. This had the effect of clearing the EMR.

Ah, thanks. I was missing the fact that the race comes into picture only
when using the DMA engine driver. I guess that should be mentioned
somewhere since it is not immediately obvious.

The patch looks good to me. So if you respin just this one with some
updated explanation based on what you wrote below, I will take it.

Thanks,
Sekhar