On Tue, Jun 11, 2013 at 2:29 PM, Heiko St?bner [off-list ref] wrote:
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Therefore add a flag that lets _is_valid_div limit the valid dividers
to these values. _get_maxdiv is also adapted to return even values
for the CLK_DIVIDER_ONE_BASED case.
Just one nitpick below (I'm okay with current implementation, but you
might find my proposal useful).
quoted hunk ↗ jump to hunk
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
quoted hunk ↗ jump to hunk
@@ -141,6 +149,8 @@ static bool _is_valid_div(struct clk_divider *divider, unsigned int div)
return is_power_of_2(div);
if (divider->table)
return _is_valid_table_div(divider->table, div);
+ if (divider->flags & CLK_DIVIDER_EVEN && div != 1 && (div % 2) != 0)
+ return false;
return true;
}
What if rewrite like
if (divider->flags & CLK_DIVIDER_EVEN == 0)
return true;
return div < 2 || div % 2 == 0;
--
With Best Regards,
Andy Shevchenko