On Thu, Jun 6, 2013 at 10:11 PM, Heiko St?bner [off-list ref] wrote:

Cortex-A9 SoCs from Rockchip use a slightly modified variant of dw_mmc
controllers that seems to require the SDMMC_CMD_USE_HOLD_REG bit to
always be set.

There also seem to be no other modifications (additional register etc)
present, so to keep the footprint low, add this small variant to the
pltfm driver.

My comments against v1 of this patch are still valid.

--
With Best Regards,
Andy Shevchenko