Hi,

On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:

From: Bastian Hecht <redacted>

We add 2 Suspend to RAM modes:
- A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
                        and the 2nd level cache with either PLL0 on
                        or off

As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
is included here too, so CPUIdle can use both power down modes (not
included in this patch).

The setup of the SYSC regarding the external IRQs is taken from
pm-sh7372.c from Magnus Damm.

Signed-off-by: Bastian Hecht <redacted>

Missing S-o-b from you, Simon?

+	.text
+ENTRY(v7_cpu_resume)
+	bl	v7_invalidate_l1
+	b	cpu_resume
+ENDPROC(v7_cpu_resume)

This is a global namespace so it'll conflict with i.MX whenever
you multiplatform enable shmobile. Might want to pick a more
unique name.


-Olof