Hello,

On Wed, May 29, 2013 at 09:46:42AM +0100, richard -rw- weinberger wrote:

On Wed, May 29, 2013 at 10:24 AM, Wang, Yalin [off-list ref] wrote:

quoted

I have download the latest linux kernel code  3.9.4
And Compare with  3.4.0 kernel .

It seems there is no change for this part ,
So it will still happen .
Does anyone know who is responsible for  arm arch part kernel code ?

See MAINTAINERS file.
CC'ing linux-arm-kernel at lists.infradead.org

Cheers for adding us to CC.

quoted

quoted

#ifdef CONFIG_ARM_THUMB
        tst     r8, #PSR_T_BIT
        movne   r10, #0                         @ no thumb OABI emulation
        ldreq   r10, [lr, #-4]                  @ get SWI instruction          // crash at this instruction, when get SWI instruction

Do you have the panic log please? Also, which SoC are you using and how are
you reproducing this?

quoted

quoted

        ldr     r10, [lr, #-4]                  @ get SWI instruction
  A710( and     ip, r10, #0x0f000000            @ check for SWI         )
  A710( teq     ip, #0x0f000000                                         )
  A710( bne     .Larm710bug                                             )
#endif
#ifdef CONFIG_CPU_ENDIAN_BE8
        rev     r10, r10                        @ little endian instruction
#endif

/*********************************************************************
******************************/

Then reason why it will crash when get SWI instruction is maybe This
page is clear to aged by kernel, But this MMU fault happpened in
kernel, So the kernel do_page_fault function will not clear this page
to young, So that  will crash .

Sounds like we might need some USER annotations around the instruction
loads, but we should also rework the code so that we re-enable interrupts
first.

Will