Dear Juha Lumme,
On MX23 the XFER_COUNT part in ctrl0 field in DMA descriptor was improperly
OR'd during the construction of DMA descriptor chain, instead of being
freshly set.
Because of that too many bytes were being expected from SPI during the last
DMA cycle.
This caused a timeout (SSP_TIMEOUT) to happen in the processing of the last
DMA descriptor, and thus reads and writes were failing.
This is a fix for the problem, by clearing XFER_COUNT bytes in ctrl0 before
setting the new XFER_COUNT for DMA descriptor.
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <redacted>
Cc: Shawn Guo <redacted>
Signed-off-by: Juha Lumme <redacted>
Acked-by: Marek Vasut <marex@denx.de>
Bump? This is stable matter too.
Best regards,
Marek Vasut