[PATCH 1/6] ARM: sunxi: Add pinctrl driver for Allwinner SoCs
From: Maxime Ripard <hidden>
Date: 2013-01-07 15:50:42
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linux-devicetree
Hi Linus, Le 07/01/2013 00:46, Linus Walleij a ?crit :
On Wed, Dec 19, 2012 at 9:18 PM, Maxime Ripard [off-list ref] wrote:quoted
The Allwinner SoCs have an IP module that handle both the muxing and the GPIOs.Sorry for very slow review :-( :-(
That's fine, at that time of the year, I wasn't expecting a fast review anyway :)
quoted
include/linux/pinctrl/pinconf-generic.h | 1 +Can you break this into a separate patch and rebase it? It does not apply anymore after v3.8...
Ah, yes, of course... Will do.
quoted
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h index 4f0abb9..5f5968d 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h@@ -74,6 +74,7 @@ enum pin_config_param { PIN_CONFIG_DRIVE_PUSH_PULL, PIN_CONFIG_DRIVE_OPEN_DRAIN, PIN_CONFIG_DRIVE_OPEN_SOURCE, + PIN_CONFIG_DRIVE_CURRENT, PIN_CONFIG_INPUT_SCHMITT, PIN_CONFIG_INPUT_DEBOUNCE, PIN_CONFIG_POWER_SOURCE,Above the definitions there is some kerneldoc and that is where this has to be defined. You also have to defines what the argument to this parameter is. I think it should be renamed PIN_CONFIG_DRIVE_STRENGTH and the argument should be the number of drivers stages. These things are constructed with totem-pole-like outputs and the number of totempoles define the drive strength, usually it will be something like 1 = 2mA 2 = 4mA 3 = 6mA 4 = 8mA or similar, as you see 2 mA for each added driver stage. The driver can convert to any internal representation...
Ok, I will do it. Do you have other comments on the driver that I should wait for before sending a v3? Thanks, Maxime -- Maxime Ripard, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com