On Wed, Nov 21, 2012 at 04:59:46PM +0100, Andrew Lunn wrote:
On Sun, Nov 18, 2012 at 04:29:44PM +0000, Russell King - ARM Linux wrote:
quoted
Fix the acknowledgement of PMU interrupts on Dove: some Dove hardware
has not been sensibly designed so that interrupts can be handled in a
race free manner. The PMU is one such instance.
Hi Russel
I checked with Marvell. They confirmed there is no race free way to
clear these interrupts :-(
That's what I thought given how the hardware behaves and what the
documentation says. So the best we can do is to ensure that the window
between reading and writing is as small as possible. Not perfect but
it's the best we can do with the buggy hardware we have. :(