[PATCH] ARM: Fix errata 751472 handling on Cortex-A9 r1p*

Catalin Marinas [off-list ref] writes:

On Thu, Nov 15, 2012 at 12:41:43PM +0000, Siarhei Siamashka wrote:

quoted

BTW, I always wondered about what could be preventing TI and the other
silicon vendors from using something like an SMC API based on
asymmetric cryptography? My understanding is that for OMAP4 GP chips,
ROM code switches to non-secure mode before passing control to the
bootloader and there is simply no way to workaround bugs like this.

AFAIK, there are some SMCs to the OMAP secure firmware that allow such
bits to be set (see omap4_l2x0_set_debug() for example). I'm not sure
they are documented.

The trouble with OMAP is that the secure ROM API only allows access to a
tiny subset of the registers we'd need.  In part this can be explained
by the important OMAP customers all using the HS chips with full access
to secure mode.

-- 
M?ns Rullg?rd
mans at mansr.com