Thread (10 messages) 10 messages, 7 authors, 2012-11-14
STALE4950d

[PATCH] arm: zynq: add system level control register manager

From: Josh Cartwright <hidden>
Date: 2012-11-13 19:03:30

On Tue, Nov 13, 2012 at 06:42:42PM +0000, John Linn wrote:
quoted
-----Original Message-----
From: Josh Cartwright [mailto:josh.cartwright at ni.com]
Sent: Tuesday, November 13, 2012 10:34 AM
To: Michal Simek
Cc: Josh Cartwright; Daniel Borkmann; Arnd Bergmann; linux-arm-kernel at lists.infradead.org; John Linn
Subject: Re: [PATCH] arm: zynq: add system level control register manager

On Mon, Nov 12, 2012 at 11:35:46AM +0000, Michal Simek wrote:
quoted
quoted
   3. Figure out MIO pinctrl support and bindings (?)
We will look at this topic more closely.
For some clarification: are you (or someone at Xilinx) actively looking
at this?
Hi Josh,

No one is looking at it that I know of (other than maybe Michal). Our
previous thinking was that this was low priority as the first stage
boot loader sets up the MIO prior to the kernel running. U-boot needs
the MIO setup for some set of devices also.

I don't know the use cases for dynamic MIO, or I'm just
misunderstanding what the pinctrl really does. Do designers often
build a board to deal with being able use the pins for multiple
purposes?
I'm less concerned about dynamic (runtime) MIO configuration.  What I
would personally like to see put into place before the peripherals are
moved over is for the MIO configuration to be explicitly modelled in the
device tree, instead of implicitly in the u-boot/kernel handoff as you
have described.

I think that also means the logic to commit whatever MIO configuration
described in the device tree to hardware would be there, too.

  Josh
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