Thread (40 messages) flat view 40 messages, 7 authors, 2012-11-26
STALE5003d

Revision v1 of 4 in this series.

Revisions (4)
  1. v1 [diff vs current]
  2. v1 [diff vs current]
  3. v1 current
  4. v1 [diff vs current]

[PATCH 1/3] ASoC: Davinci: McASP: add support new McASP IP Variant

From: Hebbar, Gururaja <hidden>
Date: 2012-09-03 06:57:22
Also in: alsa-devel

On Sat, Sep 01, 2012 at 06:14:44, Mark Brown wrote:
On Fri, Aug 31, 2012 at 06:20:57PM +0530, Hebbar, Gururaja wrote:
quoted
+			if (dev->version == MCASP_VERSION_3) {
+				mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL,
 								FIFO_ENABLE);
-			mcasp_set_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
+				mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL,
 								FIFO_ENABLE);
+			} else {
+				mcasp_clr_bits(dev->base +
+					DAVINCI_MCASP_RFIFOCTL,	FIFO_ENABLE);
+				mcasp_set_bits(dev->base +
+					DAVINCI_MCASP_RFIFOCTL,	FIFO_ENABLE);
+			}
This is all basically OK but it seems like it'd be better if all these
dev->version checks were switch statements.  That way when the hardware
designers get bored and add version 4 of the register map it'll slot in
naturally, and it'll be more clear what the code currently handles.
Ok I will update this. Since 3/3 is already accepted & I don?t see any reviews
for 2/3, I will only resend this patch (1/3). Is it ok?

Regards, 
Gururaja
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help