[PATCH 2/4] ASoC: mxs-saif: set a base clock rate for EXTMASTER mode work
From: Dong Aisheng <hidden>
Date: 2012-07-20 09:20:25
Also in:
alsa-devel
Subsystem:
sound, sound - soc layer / dynamic audio power management (asoc), the rest · Maintainers:
Jaroslav Kysela, Takashi Iwai, Liam Girdwood, Mark Brown, Linus Torvalds
From: Dong Aisheng <redacted> Set an initial clock rate for the saif internal logic to work properly. This is important when working in EXTMASTER mode that uses the other saif's BITCLK&LRCLK but it still needs a basic clock which should be fast enough for the internal logic. Cc: Mark Brown <redacted> Cc: Liam Girdwood <redacted> Cc: Wolfram Sang <redacted> Cc: Shawn Guo <redacted> Signed-off-by: Dong Aisheng <redacted> --- sound/soc/mxs/mxs-saif.c | 16 +++++++++++++++- 1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index fdbb36a..b303071 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c@@ -427,8 +427,22 @@ static int mxs_saif_hw_params(struct snd_pcm_substream *substream, /* prepare clk in hw_param, enable in trigger */ clk_prepare(saif->clk); - if (saif != master_saif) + if (saif != master_saif) { + /* + * Set an initial clock rate for the saif internal logic to work + * properly. This is important when working in EXTMASTER mode + * that uses the other saif's BITCLK&LRCLK but it still needs a + * basic clock which should be fast enough for the internal + * logic. + */ + clk_enable(saif->clk); + ret = clk_set_rate(saif->clk, 24000000); + clk_disable(saif->clk); + if (ret) + return ret; + clk_prepare(master_saif->clk); + } scr = __raw_readl(saif->base + SAIF_CTRL);
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1.7.0.4