Thread (7 messages) flat view 7 messages, 3 authors, 2012-07-16

[RESEND PATCH 1/1] clk: add DT support for clock gating control

From: Rob Herring <hidden>
Date: 2012-07-14 05:00:08
Also in: linux-devicetree, lkml

On 07/13/2012 04:42 AM, Sebastian Hesselbarh wrote:
On 07/13/2012 05:19 AM, Rob Herring wrote:
quoted
What's implemented in Linux should not define the binding. The binding
should describe the hardware.
[...]
True, but not your problem to implement. A binding doesn't necessarily
mean there is a full Linux implementation. We just don't want to create
something only to find others need something completely different.
Ok, what about a DT describing the following for a simple register-based
clock gating controller and the corresponding gated-clock independent of
the controller. I am sure there are a bunch of SoCs out there that
control their clock gates by writing some bits to a register. If that
DT description matches your expectations, I ll prepare patches with
documentation and implementation for common clock framework.
Clock gates are just 1 part. There's muxes, dividers, plls, etc. I'm not
convinced that it makes sense to define clocks at this level. For
complex chips, I think just defining the chips clock controller module
as a single node with lots of clock outputs. The primary need is to
describe board specific changes not SOC level clock tree. Much of it is
static and generally only a few clocks may change config board to board.
Sebastian

-- 
 /* Simple clock gating controller based on bitmasks and register */
cgc: clock-gating-control at f1000000 {
  compatible = "clock-gating-control-register";
  reg = <0xf1000000 0x4>;

  /* Clock gating control with one bit at bit position 0
     enable with (1<<0), disable with (0<<0) */
  cgctrl_usb0: cgc_usb0 {
    clock-gating-control,shift = <0>;
    clock-gating-control,mask = <1>;
    clock-gating-control,enable = <1>;
    clock-gating-control,disable = <0>;
  };

  /* Clock gating control with two bits at bit position 1-2
     enable with (2<<1), disable with (0<<1) */
  cgctrl_sata: cgc_sata {
    clock-gating-control,shift = <1>;
    clock-gating-control,mask = <3>;
    clock-gating-control,enable = <2>;
    clock-gating-control,disable = <0>;
  };
};

/* Generic clock gate description that can be used with
   any clock gating controller */
cg_usb0: clockgate at 0 {
  compatible = "gated-clock";
  #clock-cells = <0>;
  clocks = <&osc>;
  clock-gate-control = <&cgctrl_usb0>;
};
I don't see this scaling to ~50 clocks.

Rob
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