On Wed, May 09, 2012 at 02:13:35PM +0300, Peter De Schrijver wrote:

Ok. Thanks. One more question. We have some clocks with special features
such as request lines for clock outputs, delays for clocks recovered from
an external source or several divisors which are used based on the state
of the module which is served by the clock (eg. an idle divisor and an active
divisor). How should these be modelled?

For the idle/active divisors could they be represented as separate
clocks?