[PATCH 4/6] ARM: ux500: select L2X0 cache on ux500
From: mathieu.poirier@linaro.org (mathieu.poirier at linaro.org)
Date: 2012-02-25 19:55:05
Subsystem:
arm port, arm/nomadik/ux500 architectures, the rest · Maintainers:
Russell King, Linus Walleij, Linus Torvalds
From: Arnd Bergmann <arnd@arndb.de> The cache controller needs to be enabled for the cortex-a9 specific errata that are also selected to work. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> --- arch/arm/mach-ux500/Kconfig | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 50010b8..7ee7013 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig@@ -8,6 +8,7 @@ config UX500_SOC_COMMON select ARM_ERRATA_753970 select ARM_ERRATA_754322 select ARM_ERRATA_764369 + select CACHE_L2X0 config UX500_SOC_DB5500 bool
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1.7.5.4