Thread (9 messages) flat view 9 messages, 2 authors, 2012-02-14
STALE5292d

Revision v2 of 2 in this series.

Revisions (2)
  1. v2 [diff vs current]
  2. v2 current

[PATCH v2 3/4] ARM: architected timers: add DT support

From: Christopher Covington <hidden>
Date: 2012-02-13 23:05:20

Hi Marc,

On 02/01/2012 11:59 AM, Marc Zyngier wrote:
quoted hunk ↗ jump to hunk
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.

Signed-off-by: Will Deacon <redacted>
Signed-off-by: Marc Zyngier <redacted>
---
 .../devicetree/bindings/arm/arch_timer.txt         |   23 +++++++++
 arch/arm/kernel/arch_timer.c                       |   53 +++++++++++++++++---
 2 files changed, 69 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/arch_timer.txt
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
new file mode 100644
index 0000000..84e93f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -0,0 +1,23 @@
+* ARM architected timer
+
+ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which
+provides a per-cpu local timer.
+
+The timer is attached to a GIC to deliver its two per-processor
+interrupts (one for the secure mode, one for the non-secure mode).
+
+** Timer node properties:
+
+- compatible : Should be "arm,armv7-timer"
+
+- interrupts : One or two interrupts for secure and non-secure mode
+
+- clock-frequency : The frequency of the main counter, in Hz. Optionnal.
Spelling.

[snip]

Regards,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help