oprofile and ARM A9 hardware counter

Will Deacon [off-list ref] writes:

On Fri, Jan 27, 2012 at 01:47:01PM +0000, M?ns Rullg?rd wrote:

quoted

Will Deacon [off-list ref] writes:

quoted

Mans,

On Fri, Jan 27, 2012 at 12:56:35PM +0000, M?ns Rullg?rd wrote:

quoted

Will Deacon [off-list ref] writes:

quoted

Did this lead anywhere in the end? It seems as though Ming Lei has a working
setup but Stephane is unable to replicate it, despite applying the necessary
patches and trying an updated bootloader.

With the patches listed above plus the one in [1], I get PMU interrupts.
However, unless I restrict the profiled process to one CPU
(taskset 1 perf record ...), I get a panic in armpmu_event_update() with
the 'event' argument being null when called from armv7pmu_handle_irq().

[1] http://article.gmane.org/gmane.linux.ports.arm.omap/69696

Great, thanks for trying this out. Which version of the kernel were you
using? I fixed a bunch of NULL pointer derefs. during the 3.2 window, but if
you were using an -rc kernel you have have hit one of them.

This was with the Linaro tilt-3.2 kernel from
git://git.linaro.org/landing-teams/working/ti/kernel.git, commit
73e2c294444f209d281f7cd10b52b53b087e74f1.  Maybe one of the many patches
it has on top of 3.2 is to blame.

Perhaps, or (more likely) the interrupt affinity for the CTI isn't working
properly and the interrupt is always delivered to CPU0. I'll keep this in
mind in case we get any more reports like this.

It works whichever CPU I pin it to (i.e. taskset 2 also works).

FWIW, my /proc/interrupts looks like this when perf is running:

           CPU0       CPU1
 29:   25238127    1409121       GIC  twd
 33:    4586197          0       GIC  arm-pmu
 34:          0    4744550       GIC  arm-pmu
 39:          0          0       GIC  TWL6030-PIH
 41:          0          0       GIC  l3-dbg-irq
 42:          0          0       GIC  l3-app-irq
 43:          0          0       GIC  prcm
 44:        141          0       GIC  DMA
[...]

-- 
M?ns Rullg?rd
mans at mansr.com