OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)?
From: Måns Rullgård <hidden>
Date: 2012-01-17 14:23:07
Also in:
linux-omap
Catalin Marinas [off-list ref] writes:
On Tue, Jan 17, 2012 at 12:27:25PM +0000, Aneesh V wrote:quoted
But I thought enabling L2$ again in kernel is the cleaner solution.Why? It gets enabled via SCTLR.M together with L1.
Not if the L2EN bit of the auxiliary control register was cleared, and u-boot messes with this bit. -- M?ns Rullg?rd mans at mansr.com