Thread (61 messages) 61 messages, 12 authors, 2011-12-06

[PATCH v3 4/5] clk: basic gateable and fixed-rate clks

From: Mark Salter <hidden>
Date: 2011-11-22 15:03:53
Also in: linux-omap, lkml

On Tue, 2011-11-22 at 13:11 +0000, Arnd Bergmann wrote:
On Tuesday 22 November 2011, Mike Turquette wrote:
quoted
+static void clk_hw_gate_set_bit(struct clk *clk)
+{
+       struct clk_hw_gate *gate = to_clk_hw_gate(clk);
+       u32 reg;
+
+       reg = __raw_readl(gate->reg);
+       reg |= BIT(gate->bit_idx);
+       __raw_writel(reg, gate->reg);
+}
You cannot rely on __raw_readl() to do the right thing, especially
in architecture independent code. The safe (but slightly inefficient)
solution would be readl/writel. For ARM-only code, it would be best
to use readl_relaxed()/writel_relaxed(), but most architectures do
not implement that. We can probably add a set of helpers in asm-generic/
to define them to the default functions, like "#define readl_relaxed(x)
readl(x)", which I think is a good idea anyway.
readl/writel won't work for big endian CPU when the registers are on a
bus that does the endian swabbing in hardware.

--Mark
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