Thread (15 messages) 15 messages, 6 authors, 2011-09-20

[PATCH 3/4] net/fec: set phy_speed to the optimal frequency 2.5 MHz

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STALE5508d SUPERSEDED

From: Troy Kisky <hidden>
Date: 2011-09-19 22:39:30
Also in: netdev

Revision v1 of 16 in this series.

Revisions (16)
  1. v1
  2. v1 current
  3. v1
  4. v1
  5. v1
  6. v1
  7. v1
  8. v2 [diff vs current]
  9. v2 [diff vs current]
  10. v2 [diff vs current]
  11. v2 [diff vs current]
  12. v2 [diff vs current]
  13. v2 [diff vs current]
  14. v3 [diff vs current]
  15. v4 [diff vs current]
  16. v5 [diff vs current]
On 9/18/2011 4:54 AM, Shawn Guo wrote:
quoted hunk ↗ jump to hunk
With the unnecessary 1 bit left-shift on fep->phy_speed during the
calculation, the phy_speed always runs at the half frequency of the
optimal one 2.5 MHz.

The patch removes that 1 bit left-shift to get the optimal phy_speed.

Signed-off-by: Shawn Guo<redacted>
---
  drivers/net/fec.c |    2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 5ef0e34..04206e4 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -1007,7 +1007,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
  	/*
  	 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
  	 */
-	fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000)<<  1;
+	fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000);
  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);

  	fep->mii_bus = mdiobus_alloc();
Do you need to round up to an even value? Is the hardware documentation 
wrong?
Does this need a quirk? What boards has this been verified to fix?

Thanks
Troy
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