Thread (11 messages) flat view 11 messages, 4 authors, 2011-08-01
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Revision v9 of 21 in this series.

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[RFC PATCH v9 0/4] Consolidating GIC per-cpu interrupts

From: Marc Zyngier <hidden>
Date: 2011-08-01 08:20:55

On 28/07/11 07:34, Stephen Boyd wrote:
On 07/21/2011 09:57 AM, Marc Zyngier wrote:
quoted
The current GIC per-cpu interrupts (aka PPIs) suffer from a number of
problems:
[snip]
quoted
Patches against next-20110721, tested on PB11MP. As this patch series
is quite different from the previous one, I've dropped all previous
acks from platform maintainers.
I tried this out the other day and it didn't work. The setup_irq() calls
in msm timer code fails and then we calibrate delay forever. I haven't
looked further.
Ah, of course. Need to do a gic_request_ppi() on CPU0's timer instead of
request_irq(), but only on msm8x60/msm8960. Not very nice.

I'll update the patches and repost them later today.

Cheers,

	M.
-- 
Jazz is not dead. It just smells funny...
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