[PATCH v2] ARM: CSR: Adding CSR SiRFprimaII board support

On Tuesday 05 July 2011, Barry Song wrote:

quoted

If your hardware can do that, you can replace the msleep() with a
single readl or a readl()/msleep(1) loop?

i can't agree more. if there is such a register in chip, we would have
used it. ic guys confirmed there isn't such a register. so..delay...

Ok, fair enough. Maybe add a comment then to provide an explanation
why you are waiting for exactly 10ms. This will show up when people
try to optimize boot time, so it's good to know for the reader if it
can be made shorter or not.

	Arnd