Thread (20 messages) 20 messages, 9 authors, 2011-06-20

[Linaro-mm-sig] [RFC 0/2] ARM: DMA-mapping & IOMMU integration

From: catalin.marinas@arm.com (Catalin Marinas)
Date: 2011-06-13 18:02:00
Also in: linux-mm

On Mon, Jun 13, 2011 at 05:00:16PM +0100, KyongHo Cho wrote:
quoted
FWIW, on ARMv6 and later hardware, the dma_alloc_coherent() provides
writecombine memory (i.e. Normal Noncacheable), so no need for
dma_alloc_writecombine(). On earlier architectures it is creating
Strongly Ordered mappings (no writecombine).
Do you mean that dma_alloc_coherent() and dma_alloc_writecombine() are
not different
except some additional features of dma_alloc_coherent() in ARM?
 
When CONFIG_DMA_MEM_BUFFERABLE is enabled (by default on ARMv7 and ARMv6
with some exceptions because of hardware issues), the resulting mapping
for both coherent and writecombine is the same. In both cases the
mapping is done as L_PTE_MT_BUFFERABLE which is what you want with
writecombine. You can check the pgprot_writecombine() and
pgprot_dmacoherent() macros in asm/pgtable.h

-- 
Catalin
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