[PATCH 3/6] ARM: s5pv310: update IRQ combiner to use chained entry/exit functions
From: Will Deacon <hidden>
Date: 2011-04-12 18:35:37
Subsystem:
arm port, the rest · Maintainers:
Russell King, Linus Torvalds
From: Will Deacon <hidden>
Date: 2011-04-12 18:35:37
Subsystem:
arm port, the rest · Maintainers:
Russell King, Linus Torvalds
This patch updates the IRQ combiner chained IRQ handler code to use the chained IRQ enter/exit functions in order to function correctly on primary controllers with different methods of flow control. This is required for the GIC to move to fasteoi interrupt handling. Cc: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Will Deacon <redacted> --- arch/arm/mach-exynos4/irq-combiner.c | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c
index f488b66..5a2758a 100644
--- a/arch/arm/mach-exynos4/irq-combiner.c
+++ b/arch/arm/mach-exynos4/irq-combiner.c@@ -59,8 +59,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) unsigned int cascade_irq, combiner_irq; unsigned long status; - /* primary controller ack'ing */ - chip->irq_ack(&desc->irq_data); + chained_irq_enter(chip, desc); spin_lock(&irq_controller_lock); status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
@@ -79,8 +78,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) generic_handle_irq(cascade_irq); out: - /* primary controller unmasking */ - chip->irq_unmask(&desc->irq_data); + chained_irq_exit(chip, desc); } static struct irq_chip combiner_chip = {
--
1.7.0.4