[PATCH 2/2] DM9000B: Fix PHY power for network down/up
From: Sergei Shtylyov <hidden>
Date: 2011-02-21 11:14:39
Also in:
netdev
Hello. On 21-02-2011 0:45, Henry Nestler wrote:
DM9000 revision B needs 1 ms delay after PHY power on (see spec), and PHY power must on in register
Couldn't parse that.
DM9000_GPR before all other settings will change. Remember, that register DM9000_GPR was not changed by reset sequence.
Without these fix the FIFO goes out of sync and sends wrong data after
s/these/this/
sequence of "ifconfig ethX down ; sleep 3 ; ifconfig ethX up".
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diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c index 2d4c4fc..5925569 100644 --- a/drivers/net/dm9000.c +++ b/drivers/net/dm9000.c
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@@ -1194,6 +1191,10 @@ dm9000_open(struct net_device *dev) if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev)) return -EAGAIN; + /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */ + iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ + udelay(1000); /* delay needs by DM9000B */
Why not mdelay(1)?
WBR, Sergei