quoted

quoted

? ? ? ?lcd_writel(fbi, FDADR0, fbi->fdadr[0]);
- ? ? ? lcd_writel(fbi, FDADR1, fbi->fdadr[1]);
+ ? ? ? if (fbi->lccr0 & LCCR0_SDS)
+ ? ? ? ? ? ? ? lcd_writel(fbi, FDADR1, fbi->fdadr[1]);

My original intention was to simplify the code a bit by ignoring
LCCR0_SDS, as FDADR1 would not take effect if not enabled even
if it's being read/written.

It leads to potential race condition when you try to reconfigure main plane
and overlay1 simultaneously.

You are right on this.

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+#ifdef CONFIG_FB_PXA_OVERLAY
+ ? ? ? if (cpu_is_pxa27x())
+ ? ? ? ? ? ? ? fbi->lccr0 |= LCCR0_OUC;
+#endif
+

I seem to remember LCCR0_OUC is still valid on pxa3xx, did you
do some test on pxa3xx as well?

Sorry, I have no any pxa3xx boards.

That's all right, I can give it a test later. The point is, why
did you move the code here from pxafb_overlay_init()?