[PATCH 2/6] omap4: prcm: Fix the CPUx clockdomain offsets

Hi Kevin,

On 2/2/2011 10:24 AM, Cousson, Benoit wrote:

On 2/2/2011 2:20 AM, Hilman, Kevin wrote:

quoted

Santosh Shilimkar[off-list ref]   writes:

quoted

CPU0 and CPU1 clockdomain is at the offset of 0x18 from the LPRM base.
The header file has set it wrongly to 0x0. Offset 0x0 is for CPUx power
domain control register

Fix the same.

Has this also been updated in the autogen scripts?

Benoit?

No, I didn't see any patch to update that yet.

Santosh or Rajendra,
Did you already fix it?

I updated the scripts with Santosh fixes and found a register name issue in this file.

The fix is inlined at the end. 
Santosh will include it in a new revision of the series.

Regards,
Benoit

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