PXA3xx Specification Update document states that the 806MHz
operating points were added for PXA31x processors A2 stepping.
This patch adds 806MHz operating points support for PXA31x A2 stepping.
Signed-off-by: Axel Lin <redacted>
---
I cannot find any details for PXA31x stepping B1 and B2,
thus I made this patch for PXA31x stepping A2 only.
Axel
arch/arm/mach-pxa/cpufreq-pxa3xx.c | 23 +++++++++++++++++++----
1 files changed, 19 insertions(+), 4 deletions(-)
From: Igor Grinberg <hidden> Date: 2011-02-15 16:58:12
Hi,
On 02/15/11 18:20, Axel Lin wrote:
quoted hunk
PXA3xx Specification Update document states that the 806MHz
operating points were added for PXA31x processors A2 stepping.
This patch adds 806MHz operating points support for PXA31x A2 stepping.
Signed-off-by: Axel Lin <redacted>
---
I cannot find any details for PXA31x stepping B1 and B2,
thus I made this patch for PXA31x stepping A2 only.
Axel
arch/arm/mach-pxa/cpufreq-pxa3xx.c | 23 +++++++++++++++++++----
1 files changed, 19 insertions(+), 4 deletions(-)
@@ -210,15 +210,30 @@ static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)/* set default policy and cpuinfo */policy->cpuinfo.min_freq=104000;-policy->cpuinfo.max_freq=(cpu_is_pxa320())?806000:624000;++if(cpu_is_pxa300())+policy->cpuinfo.max_freq=624000;+elseif(cpu_is_pxa310())+policy->cpuinfo.max_freq=((read_cpuid_id()&0xf)==0x2)?+806000:624000;+elseif(cpu_is_pxa320())+policy->cpuinfo.max_freq=806000;+policy->cpuinfo.transition_latency=1000;/* FIXME: 1 ms, assumed */policy->max=pxa3xx_get_clk_frequency_khz(0);policy->cur=policy->min=policy->max;-if(cpu_is_pxa300()||cpu_is_pxa310())+if(cpu_is_pxa300())ret=setup_freqs_table(policy,ARRAY_AND_SIZE(pxa300_freqs));--if(cpu_is_pxa320())+elseif(cpu_is_pxa310())+/* PXA310 A2 STEPPING supports 806Mhz operating points */+if((read_cpuid_id()&0xf)==0x2)+ret=setup_freqs_table(policy,+ARRAY_AND_SIZE(pxa320_freqs));+else+ret=setup_freqs_table(policy,+ARRAY_AND_SIZE(pxa300_freqs));+elseif(cpu_is_pxa320())ret=setup_freqs_table(policy,ARRAY_AND_SIZE(pxa320_freqs));if(ret){
Yeah, I've proposed something like that about half a year ago:
http://www.spinics.net/lists/arm-kernel/msg92899.html
Eric was not so happy about it back then, may be this time?
Eric, what do you think?
Also, there is one thing that is not related to this patch, but
if you have the hardware, you need to be concerned with,
is that the vcc_core voltage has to be 1.4V, otherwise your
hardware will be unstable.
--
Regards,
Igor.
Also, there is one thing that is not related to this patch, but
if you have the hardware, you need to be concerned with,
is that the vcc_core voltage has to be 1.4V, otherwise your
hardware will be unstable.
I don't see any unstable issue on my device.
But it seems the vcc_core and vcc_sram fields of pxa3xx_freq_info
are not used now.
Regards,
Axel
From: Igor Grinberg <hidden> Date: 2011-02-22 08:35:51
Hi,
On 02/22/11 03:12, Axel Lin wrote:
Hi Igor,
quoted
Also, there is one thing that is not related to this patch, but
if you have the hardware, you need to be concerned with,
is that the vcc_core voltage has to be 1.4V, otherwise your
hardware will be unstable.
I don't see any unstable issue on my device.
But it seems the vcc_core and vcc_sram fields of pxa3xx_freq_info
are not used now.
Indeed, they are not used, because we don't have any DVFS driver for PXA3xx.
But, the hardware is running regardless of you have the driver or not ;)
There are other means to make sure the vcc_core voltage is set appropriately:
1) could be already set (PMIC default)
2) could be set by "Hardware-Controlled Voltage-Change Sequencer" automatically
(PXA3xx_DM_Vol_I chapter 6.8.3) if your PMIC is 100% compatible with PXA3xx
and PVCR[FVE/PVE] bits set accordingly.
3) If your PMIC is for some reason not 100% compatible, then the voltage can be
set by regulator API or even by the bootloader.
Anyway, to make sure it is set to the appropriate level, you need to measure it.
Usually, this line has some capacitors on it, so it shouldn't be a hard task
Now, regarding hardware instability:
I've seen instabilities related to the vcc_core set improperly, but it has never
showed up that quickly, sometimes it took a week of testing for it to show up.
But when it shows up, you can see strange things happening, like your DRAM
is messed or buses fail or the cpu just freezes.
Another thing (which could be related to the patch) is the package marking.
We have PXA3xx SoCs marked A2 stepping, but C624, which means that the
highest running frequency should not exceed 624MHz.
What is your PXA3xx A2 marking in respect to Cxxx option?
--
Regards,
Igor.
Also, there is one thing that is not related to this patch, but
if you have the hardware, you need to be concerned with,
is that the vcc_core voltage has to be 1.4V, otherwise your
hardware will be unstable.
I don't see any unstable issue on my device.
But it seems the vcc_core and vcc_sram fields of pxa3xx_freq_info
are not used now.
Indeed, they are not used, because we don't have any DVFS driver for PXA3xx.
But, the hardware is running regardless of you have the driver or not ;)
There are other means to make sure the vcc_core voltage is set appropriately:
1) could be already set (PMIC default)
2) could be set by "Hardware-Controlled Voltage-Change Sequencer" automatically
? (PXA3xx_DM_Vol_I chapter 6.8.3) if your PMIC is 100% compatible with PXA3xx
? and PVCR[FVE/PVE] bits set accordingly.
3) If your PMIC is for some reason not 100% compatible, then the voltage can be
? set by regulator API or even by the bootloader.
Anyway, to make sure it is set to the appropriate level, you need to measure it.
Usually, this line has some capacitors on it, so it shouldn't be a hard task
Thanks for the information. I'll check my settings.
Now, regarding hardware instability:
I've seen instabilities related to the vcc_core set improperly, but it has never
showed up that quickly, sometimes it took a week of testing for it to show up.
But when it shows up, you can see strange things happening, like your DRAM
is messed or buses fail or the cpu just freezes.
Another thing (which could be related to the patch) is the package marking.
We have PXA3xx SoCs marked A2 stepping, but C624, which means that the
highest running frequency should not exceed 624MHz.
This means not all PXA310 A2 stepping supports 806Mhz.
Can we differentiate the Cxxx option in software?
What is your PXA3xx A2 marking in respect to Cxxx option?
From: Eric Miao <hidden> Date: 2011-02-22 13:19:22
quoted
Another thing (which could be related to the patch) is the package marking.
We have PXA3xx SoCs marked A2 stepping, but C624, which means that the
highest running frequency should not exceed 624MHz.
This means not all PXA310 A2 stepping supports 806Mhz.
Can we differentiate the Cxxx option in software?
quoted
What is your PXA3xx A2 marking in respect to Cxxx option?
Mine is 88AP310-A2-BGK2C806.
Haojian,
Can you help check on the stepping/markings on these processors
to see which of them supports 806MHz, reliably?
- eric
-----Original Message-----
From: Eric Miao [mailto:eric.y.miao at gmail.com]
Sent: 2011?2?22? 9:19 PM
To: Axel Lin; Haojian Zhuang
Cc: Igor Grinberg; linux-kernel at vger.kernel.org; Russell King; linux-
arm-kernel at lists.infradead.org
Subject: Re: [PATCH] ARM: pxa: support 806MHz operating points for
PXA31x processors A2 stepping
quoted
quoted
Another thing (which could be related to the patch) is the package
marking.
quoted
quoted
We have PXA3xx SoCs marked A2 stepping, but C624, which means that
the
quoted
quoted
highest running frequency should not exceed 624MHz.
This means not all PXA310 A2 stepping supports 806Mhz.
Can we differentiate the Cxxx option in software?
quoted
What is your PXA3xx A2 marking in respect to Cxxx option?
Mine is 88AP310-A2-BGK2C806.
Haojian,
Can you help check on the stepping/markings on these processors
to see which of them supports 806MHz, reliably?
- eric
Hi Eric,
There's no way to recognize 806MHz on PXA310 A2 since not all A2 chips
can support 806MHz. The only way to recognize 806MHz is to read marks on
the top of chip.
Thanks
Haojian
From: Igor Grinberg <hidden> Date: 2011-02-22 13:22:12
On 02/22/11 12:38, Axel Lin wrote:
2011/2/22 Igor Grinberg [off-list ref]:
quoted
Another thing (which could be related to the patch) is the package marking.
We have PXA3xx SoCs marked A2 stepping, but C624, which means that the
highest running frequency should not exceed 624MHz.
This means not all PXA310 A2 stepping supports 806Mhz.
Can we differentiate the Cxxx option in software?
Some time ago I spoke with our local Marvell representative... and he said that this
information cannot be retrieved by software.
So this makes me think, that we may be need an option for the platform data
passed from the board (assuming that board should know what SoC is installed).
Or a kernel command line parameter... something much like Eric proposed:
http://www.spinics.net/lists/arm-kernel/msg92900.html
quoted
What is your PXA3xx A2 marking in respect to Cxxx option?