Santosh,

quoted

quoted

Maybe we need a notifier list which can be told when cpuidle

events

quoted

happen, so that parts of the system such as VFP and L2 cache

support

quoted

can do the right thing without having platforms add lots of stuff

like

quoted

        gic_secondary_init();
        gic_restore_interrupt_types();
        vfp_enable();
        l2x0_enable();
        twd_enable();
        ... etc ...

in their SoC specific code.

But do we need a strict order between such operations? The notifier
call
chain isn't too flexible.

I guess it does depends on how the archs have integrated a9. Example
on OMAP there are different power modes possible.
	1. CPU context ,TWD lost
	2. CPU context ,TWD + L1 is lost
	3. CPU context + L1 is lost + GIC lost
	4. CPU context + L1 is lost + GIC lost + L2 lost
So there is need to have flexibility of calling these function
based on power modes. I don't know how notifiers can give
this flexibility

Well if you set the priority fields in the notifier blocks correctly
then you can just return NOTIFY_STOP when you've saved/restored as much
as you want. This assumes of course that you can identify which power
mode you're entering/leaving and that each one is `deeper' than the previous.

Will