Thread (11 messages) 11 messages, 4 authors, 2011-01-19

[PATCH] omap1: Fix sched_clock for the MPU timer (Re: State of LDP3430 platform)

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From: tony@atomide.com (Tony Lindgren)
Date: 2011-01-18 22:26:13
Also in: linux-omap

* Paul Walmsley [off-list ref] [110118 11:35]:
Here's a slightly updated version of this patch, fixing a bug in one of 
the comments, and revising the commit message.  There's no functional 
difference between this and the previous version of this patch.
Thanks, here are two patches to fix the MPU timer, and then allow
compiling in both the MPU timer and the 32KiHz timer.

Tony

From: Tony Lindgren <tony@atomide.com>
Date: Tue, 18 Jan 2011 13:25:39 -0800
Subject: [PATCH] omap1: Fix sched_clock for the MPU timer

Otherwise systems using the MPU timer will hang.

Signed-off-by: Tony Lindgren <tony@atomide.com>
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,11 +44,14 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/sched.h>
 
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
+#include <asm/sched_clock.h>
+
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
@@ -67,7 +70,7 @@ typedef struct {
 ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +	\
 				 (n)*OMAP_MPU_TIMER_OFFSET))
 
-static inline unsigned long omap_mpu_timer_read(int nr)
+static inline unsigned long notrace omap_mpu_timer_read(int nr)
 {
 	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 	return timer->read_tim;
@@ -212,11 +215,21 @@ static struct clocksource clocksource_mpu = {
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+static void notrace mpu_update_sched_clock(void)
+{
+	u32 cyc = mpu_read(&clocksource_mpu);
+	update_sched_clock(&cd, cyc, (u32)~0);
+}
+
 static void __init omap_init_clocksource(unsigned long rate)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
 
+	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+
 	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
 	omap_mpu_timer_start(1, ~0, 1);
 
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