[PATCH 2/2] ARM: use cached memory in dma_alloc_coherent() if possible

On Tue, Dec 21, 2010 at 11:11:21AM +0000, Catalin Marinas wrote:

On Tuesday, 21 December 2010, Russell King - ARM Linux
[off-list ref] wrote:

quoted

On Tue, Dec 21, 2010 at 10:20:02AM +0000, Jamie Iles wrote:

quoted

For fully coherent architectures or systems using the ARM ACP to provide
coherency to individual device, use cached memory as the coherent
backing rather than noncached or simply bufferable memory.

As has already been covered by Catalin, as far as we know, no one uses
the ACP yet. ?Do you have a system which does?

I'm not sure there is any publicly available system yet. This may be
present in future systems, though only a few peripherals would
probably be connected to the ACP (like an HD LCD controller). So I
don't think we'll get a completely coherent system and a better
approach may be to add per-device DMA operations.

Ok, we may not get new systems that are fully coherent but we have 
ixp23xx that is fully coherent and the ARM DMA API as it is already 
checks for this with the arch_is_coherent().

You can do per-device DMA operations with the first patch by defining 
the operations in struct device::archdata::dma_ops. If all you need is 
something that initializes scatterlists then you can use the 
coherent_dma_ops struct.

Jamie