[PATCH 17/24] msm: 8x60: setup correct handlers for private interrupts
From: Jeff Ohlstein <hidden>
Date: 2010-08-25 04:59:32
Also in:
linux-arm-msm, lkml
Subsystem:
arm port, the rest · Maintainers:
Russell King, Linus Torvalds
From: Abhijeet Dharmapurikar <redacted> Private Peripheral interrupts could be edge triggered or level triggered depending on the platform. Initialize handlers for these in board file. Signed-off-by: Abhijeet Dharmapurikar <redacted> --- arch/arm/mach-msm/board-msm8x60.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index c6bf8e3..e2e5a5c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c@@ -46,7 +46,7 @@ static void __init msm8x60_init_irq(void) { unsigned int i; - gic_dist_init(0, MSM_QGIC_DIST_BASE, 1); + gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START); gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; gic_cpu_init(0, MSM_QGIC_CPU_BASE);
--
1.7.2.1
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