[RFC][PATCH 03/10] arm: mxc: changes to common plat-mxc codetoadd support for i.MX5

Robert,

-----Original Message-----
From: Robert Schwebel [mailto:r.schwebel at pengutronix.de] 
Sent: Monday, December 07, 2009 2:03 PM
To: Herring Robert-RA7055
Cc: Sascha Hauer; Amit Kucheria; List Linux Kernel; 
grant.likely at secretlab.ca; valentin.longchamp at epfl.ch; 
daniel at caiaq.de; Nguyen Dinh-R00091; 
linux-arm-kernel at lists.infradead.org
Subject: Re: [RFC][PATCH 03/10] arm: mxc: changes to common 
plat-mxc codetoadd support for i.MX5

Rob,

On Mon, Dec 07, 2009 at 10:17:52AM -0700, Herring Robert-RA7055 wrote:

quoted

Sorry, my mistake. Sasha is correct that MX27 is v1 and MX25 is v2.

timer_is_v1 is just !timer_is_v2, so really only one is 

needed. I would

quoted

define it like this to avoid having to change the timer 

code again for

quoted

any new chips:

#define timer_is_v2()   (!(cpu_is_mx1() || cpu_is_mx21() ||
cpu_is_mx27()))

Are you sure that FSL won't invent a v3 timer in the future?

There is no change on my radar, and it has not changed in 5 years. As
long as I'm around it won't change if I can help it. What is coming are
chips with a mixture of i.MX and stmp (Sigmatel) blocks. So there could
be a chip with the stmp timer, but it is completely different anyway.

Regards,
Rob

rsc
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